
Preliminary W9330F
Publication Release Date: August 1998
- 19 -
Revision A1
Address 0C - 0E: system ID, write only, no default value
ID[7:0]
ID[15:8]
1
0
ID[21:16]
These registers contain the system ID. Address 0C contains the least significant bits and 0E contains
the most significant bits. The first two bits of register 0E are hard-wired to 10 and they become the
two most significant bits of the ID when a frame is transmitted. Both the master and the slave should
be programmed to the same ID value.
The value of these registers are unaffected by hardware and software reset. They are undefined after
system power up.
Address 10: CPU CLK, write only. default: 00000011
0
0
0
0
0
0
CU1
CU0
Bit 1 to 0 defines the CPU clock divider. If bit[1:0] = 11, CPU_CLK output equivalent to OSC_IN
divided by 8. If bit[1:0] = 10, CPU_CLK is divided by 4. If bit[1:0] = 01, CPU_CLK is divided by 2. If
bit[1:0] = 00, CPU_CLK output is always low.
This register is set to the default value at hardware reset. It is not affected by software reset.
Address 12: Threshold, write only. default: 00001000
0
0
0
0
TH1
The 4 least significant bits of this register define the threshold value of the de-spreader in recognizing
preamble symbol. Each acquired symbol has a signal strength value between 0 to 15. A preamble
symbol must have signal strength above TH1 in order for it to be recognized.
TH1 is set to "1000" at hardware reset and it is not affected by software reset.
Address 14: Signal Strength, read only.
Signal Strength
This register is a relative strength indicator of the received signal. FF(Hex) indicates the strongest
signal and 0x00 indicates the weakest signal. This register should be read at the end of each receive
frame to determine signal strength. This register can be used to assist the system software to adjust
signal level or to select antenna in multi-antenna design.
Address 15: Preamble count, write only. default: 00110111
CNT1
CNT2
This register contains the preamble symbol count during preamble acquisition. Preamble acquisition
is divided into two stages. The first stage is completed when the number of preamble symbol equals
to CNT1 is acquired. The second stage is completed when the number of preamble symbol equals to
CNT2 is acquired. CNT2 must always be larger than CNT1.
This register is set to the default value during hardware reset and it is not affected by software reset.