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參數資料
| 型號： | W9330F |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | Code Division Spread Spectrum Cordless Telephone Controller(具有編碼分劃和擴展頻普技術的無繩電話控制器) |
| 中文描述： | TELECOM, CORDLESS, SUPPORT CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數： | 6/26頁 |
| 文件大?。?/td> | 170K |
| 代理商： | W9330F |
Preliminary W9330F
- 6 -
Table 4: System Interface, continued
PARAMETER
PIN
TYPE
DESCRIPTIONS
CLK_IN
72
IN
System clock input. It should be set at 19.2 MHz.
CLK_OUT
71
OUT
System clock output. This signal is generated by the oscillator
circuit and should be connected to the CLK_IN input
CPU_CLK
76
OUT
CPU Clock. This is the clock input to the system micro-
controller. After power up, this is the main operating clock
divided by 8. It can be programmed to divided by 2 or by 4.
CER
82
OUT
Check sum Error. This signal is asserted at the end of each
receive subframe to indicate that at least one single bit error
has been detected. It is cleared with the status register is
read.
GPT
44
OUT
General Purpose Timer. This signal is the output of the
programmable general purpose timer. The cycle time of this
output is programmable between 125 usec to 8.192 sec with
50% duty cycle.
ID_DET
83
OUT
ID detection. This signal is set during each receive frame
after the ID field has been detected. It is clear at the end of
the receive frame if the ID is not found.
LOCK
87
OUT
Lock. Indicates that the W9330F is in the LOCK state with the
remote device. See functional description section for more
detail.
NC
26, 27
No connect. These pins must be left unconnected in the
system.
OEA
98
IN_U
Output enable for port A output pins.
OSC_EN
100
IN
Crystal oscillator enable signal. The oscillator circuit is off
when this signal is de-asserted.
OSC_IN
75
IN
Crystal input.
OSC_OUT
74
OUT
Crystal output
PA[7:0]
16, 15,
14, 13,
10, 9,
8, 7
OUT
General purpose output port.
PB[7:4]
PB[3:0]
38, 37,
36, 35,
30, 31,
32, 33
OD
OUT
General purpose output port.
PC[7:4]
PC[3:0]
25, 24,
23, 22,
21, 20,
19, 18
IN_U
IN_D
General purpose input port.
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