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參數(shù)資料
| 型號： | W9961CF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 消費家電 |
| 英文描述： | H.263/H.261 Video Codec |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP208 |
| 封裝： | 28 X 28 MM, 2.60 MM HEIGHT, PLASTIC, QFP-208 |
| 文件頁數(shù)： | 15/65頁 |
| 文件大小： | 344K |
| 代理商： | W9961CF |
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W9961CF
- 15 -
VSYNC
156
TS
Vertical Sync.
DEM
128
B
Data Enable control signal for LCD interface.
VREF
166
A
Voltage Reference. A 0.1uF bypass capacitor should always be
connected between this pin and TVAVDD, with short leads and
in close proximity to the device pins.
RSET
167
A
Reference Resistor. A resistor should be connected from this
pin to TVAVSS to control the full-scale current value.
EXTVREF
168
A
External VREF Mode: External Voltage Reference (analog
input). An external voltage reference must supply this pin with a
1.235 V (typical) reference. A 0.1uF bypass capacitor should
always be connected between this pin and TVAVDD.
Internal VREF Mode: A 0.1uF bypass capacitor should always
be connected between this pin and TVAVDD.
COMP
170
A
Compensation Pin. A 0.1uF bypass capacitor should always be
connected between this pin and TVAVDD, with short leads and
in close proximity to the device pins.
VOCLK
182
I
Output Video Clock. A stable 27 MHz reference clock input.
ISA-like Bus Interface and GPIO Ports (29 pins)
Pin Name
Pin Number
Type
Description
SD[7:0]
181-178, 176-
174, 172
B
Data Bus. ISA-like data bus to interface with the Audio
Processor.
SA[12:0]
198-192, 190,
189, 187, 186,
184, 183
B
Address Bus. They are output pins in normal operation
(PWON_14-12 = 111), while serve as address inputs when in
the Internal RAM/ROM Test mode (PWON_14-12
≠
111).
SWR#
201
B
I/O Write. It is output pin in normal operation (PWON_14-12 =
111), while serves as write input when in the Internal RAM/ROM
Test mode (PWON_14-12
≠
111).
SRD#
200
B
I/O Read. It is output pin in normal operation (PWON_14-12 =
111), while serves as read input when in the Internal RAM/ROM
Test mode (PWON_14-12
≠
111).
EINT#
199
IU
Interrupt Request Input.
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