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參數(shù)資料
| 型號(hào)： | W9961CF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | H.263/H.261 Video Codec |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP208 |
| 封裝： | 28 X 28 MM, 2.60 MM HEIGHT, PLASTIC, QFP-208 |
| 文件頁(yè)數(shù)： | 48/65頁(yè) |
| 文件大小： | 344K |
| 代理商： | W9961CF |
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W9961CF
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7.8 Host Interface Controller
PCI
Configuration
PCI Control
INTA#
Interrupt Requests
Control
PCI Slave
Control
Interrupt
Mux/Demux
Address
Data
AD[31:0]
PCI Address
PCI Data
Figure 7.15 Host Interface Controller Block Diagram
The W9961CF support a glueless interface for a 32-bit PCI bus. The PCI configuration register space
occupies 256 bytes. The W9961CF supports or returns 0 for the first 64 bytes region. Refer to section
8.1 for a detailed description of the PCI configuration space supported by the W9961CF.
7.8.1 PCI Address Spaces
The W9961CF provides three addressing spaces starting at the base addresses specified in the PCI
Base Address 1, 2, and 3 registers. Address space starting at Base Address 1 is used for PCI
accesses of W9961CF control registers, RISC data memory, and RISC program memory. Address
space starting at Base Address 2 is used for video memory accesses. Address space starting at Base
Address 3 is used for ISA-like bus interface accesses. The W9961CF control registers, DM, PM, and
video memory can be DWORD-accessed only, while the ISA-like bus interface can be BYTE-
accessed only.
7.8.2 PCI Interrupt Control
There are 16 interrupt sources which can generate INTA# to PCI bus. Channels 0 ~ 11 are reserved
for RISC asserting interrupt to the host. Channel 12 is used for the external ISA-like bus interrupt.
Channel 14 is used for the FDMA TC interrupt. Channel 15 is used for the RISC interrupt. All the 16
interrupt sources can be masked by programming a 1 to the corresponding bit of the XMSK register.
When INTA# is asserted by the W9961CF, the host has to read the XSTS register to know which
interrupt channel is active.
Table 7.7 PCI Interrupt Channels
Channel
0 ~ 11
12
13
XINT_IN
1
extint
Description
Reserved for RISC
External ISA-like bus interrupt
Not used
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