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參數資料
型號: W742C810
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 4-BIT MICROCONTROLLER
中文描述: 4-BIT, MROM, 3.58 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 2.75 MM HEIGHT, QFP-100
文件頁數: 19/42頁
文件大?。?/td> 501K
代理商: W742C810
Preliminary W742C810
Publication Release Date: May 1999
- 19 -
Revision A1
6.14 Stop Mode Operation
In stop mode, all operations of the
μ
C cease (excluding the operation of the sub-oscillator and Divider
1 and LCD driver), and MFP pin is kept to high state. The
μ
C enters stop mode when the STOP
instruction is executed and exits stop mode when an external trigger is activated (by a falling signal
on the RC). When the designated signal is accepted, the
μ
C awakens and executes the next
instruction. To prevent erroneous execution, the NOP instruction should follow the STOP command.
However, in the dual-clock slow operation mode, the STOP instruction will disable the main-oscillator;
the
μ
C system is still operated by the sub-oscillator.
6.14.1 Stop Mode Wake-up Enable Flag for RC Port (SEF)
The stop mode wake-up flag for port RC is organized as a 4-bit binary register (SEF.0 to SEF.3).
Before port RC may be used to make the device exit the stop mode, the content of the SEF must be
set first. The SEF is controlled by the MOV SEF, #I instruction. The bit descriptions are as follows:
SEF
w
w
w
0
1
2
w
3
Note: W means write only.
SEF.0 = 1 Device will exit stop mode when falling edge signal is applied to pin RC.0
SEF.1 = 1 Device will exit stop mode when falling edge signal is applied to pin RC.1
SEF.2 = 1 Device will exit stop mode when falling edge signal is applied to pin RC.2
SEF.3 = 1 Device will exit stop mode when falling edge signal is applied to pin RC.3
6.15 Hold Mode Operation
In hold mode, all operations of the
μ
C cease, except for the operation of the oscillator, Timer, Divider,
LCD driver, DTMF generator and MFP generator. The
μ
C enters hold mode when the HOLD
instruction is executed. The hold mode can be released in one of five ways: by the action of timer 0,
timer 1, divider 0, divider 1, or the RC port. Before the device enters the hold mode, the HEF, PEF,
and IEF flags must be set to define the hold mode release conditions. For more details, refer to the
instruction-set table and the following flow chart.
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