
Preliminary W742C810
Publication Release Date: May 1999
- 37 -
Revision A1
Instruction set, continued
Machine code
0000 1111 iiii nnnn
Mnemonic
SBCR
Function
ACC, WRn
←
(WRn) - I - (CF)
ACC, R
←
(R) + 1
ACC, R
←
(R) - 1
Flag affected
ZF, CF
W/C
1/1
WRn, #I
0100 1010 0xxx xxxx
INC
R
ZF, CF
1/1
0100 1010 1xxx xxxx
DEC
R
ZF, CF
1/1
Logic
0010 1010 0xxx xxxx
ANL
R, ACC
ACC
←
(R) & (ACC)
ACC
←
(WRn) & I
ACC, R
←
(R) & (ACC)
ACC, WRn
←
(WRn) & I
ACC
←
(R)
∧
(ACC)
ACC
←
(WRn)
∧
I
ACC, R
←
(R)
∧
(ACC)
ACC, WRn
←
(WRn)
∧
I
ACC
←
(R) EX (ACC)
ACC
←
(WRn) EX I
ACC, R
←
(R) EX (ACC)
ACC, WRn
←
(WRn) EX I
ZF
1/1
0010 1110 iiii nnnn
ANL
WRn, #I
ZF
1/1
0010 1011 0xxx xxxx
ANLR
R, ACC
ZF
1/1
0010 1111 iiii nnnn
ANLR
WRn, #I
ZF
1/1
0011 1010 0xxx xxxx
ORL
R, ACC
ZF
1/1
0011 1110 iiii nnnn
ORL
WRn, #I
ZF
1/1
0011 1011 0xxx xxxx
ORLR
R, ACC
ZF
1/1
0011 1111 iiii nnnn
ORLR
WRn, #I
ZF
1/1
0011 1000 0xxx xxxx
XRL
R, ACC
ZF
1/1
0011 1100 iiii nnnn
XRL
WRn, #I
ZF
1/1
0011 1001 0xxx xxxx
XRLR
R, ACC
ZF
1/1
0011 1101 iiii nnnn
XRLR
WRn, #I
ZF
1/1
Branch
0111 0
aaa aaaa aaaa
JMP
L
PC12~PC0
←
(ROMPR)
×
800H+L10~L0
PC10~PC0
←
L10~L0; if ACC.0 = "1"
PC10~PC0
←
L10~L0; if ACC.1 = "1"
PC10~PC0
←
L10~L0; if ACC.2 = "1"
PC10~PC0
←
L10~L0; if ACC.3 = "1"
PC10~PC0
←
L10~L0; if ACC = 0
PC10~PC0
←
L10~L0; if ACC ! = 0
PC10~PC0
←
L10~L0; if CF = "1"
PC10~PC0
←
L10~L0; if CF != "1"
ACC, R
←
(R) - 1; PC
←
(PC) + 2 if ACC = 0
ACC, R
←
(R) - 1; PC
←
(PC) + 2 if ACC != 0
PC
←
(PC) + 2 if R.0 = "1"
PC
←
(PC) + 2 if R.1 = "1"
PC
←
(PC) + 2 if R.2 = "1"
PC
←
(PC) + 2 if R.3 = "1"
1/1
1000 0
aaa aaaa aaaa
JB0
L
1/1
1001 0
aaa aaaa aaaa
JB1
L
1/1
1010 0
aaa aaaa aaaa
JB2
L
1/1
1011 0
aaa aaaa aaaa
JB3
L
1/1
1110 0
aaa aaaa aaaa
JZ
L
1/1
1100 0
aaa aaaa aaaa
JNZ
L
1/1
1111 0
aaa aaaa aaaa
JC
L
1/1
1101 0
aaa aaaa aaaa
JNC
L
1/1
0100 1000 0xxx xxxx
DSKZ
R
ZF, CF
1/1
0100 1000 1xxx xxxx
DSKNZ
R
ZF, CF
1/1
1010 1000 0xxx xxxx
1010 1000 1xxx xxxx
1010 1001 0xxx xxxx
1010 1001 1xxx xxxx
Subroutine
0110 0
aaa aaaa aaaa
SKB0
SKB1
SKB2
SKB3
R
R
R
R
1/1
1/1
1/1
1/1
CALL
L
STACK
←
(PC)+1;
PC12 ~ PC0
←
(ROMPR)
×
800H+L10 ~ L0
(PC)
←
STACK
1/1
0000 0001 0000 0000
RTN
1/1