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參數(shù)資料
| 型號： | W742C810 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT MICROCONTROLLER |
| 中文描述： | 4-BIT, MROM, 3.58 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 2.75 MM HEIGHT, QFP-100 |
| 文件頁數(shù)： | 30/42頁 |
| 文件大小： | 501K |
| 代理商： | W742C810 |
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Preliminary W742C810
- 30 -
6.22 LCD Controller/Driver
The W742C810 can directly drive an LCD with 40 segment output pins and 4 common output pins for
a total of 40
×
4 dots. The LCD driving mode is 1/3 bias 1/4 duty. The alternating frequency of the
LCD can be set as Fw/64, Fw/128, Fw/256, or Fw/512. The structure of the LCD alternating frequency
(FLCD) is shown in Figure 6-14.
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Fw
Selector
Fw/512
Fw/256
Fw/128
Fw/64
Sub-oscillator clock
F
LCD
Figure 6-14 LCD alternating frequency (FLCD) circuit diagram
Fw = 32.768 KHz, the LCD frequency is as shown in the table below.
Table 5 The relartionship between the F
LCD
and the duty cycle
LCD Frequency
Fw/512 (64 Hz)
Fw/256 (128Hz)
Fw/128 (256 Hz)
Fw/64 (512 Hz)
1/4 duty
16 Hz
32 Hz
64 Hz
128 Hz
Corresponding to the 40 LCD drive output pins, there are 40 LCD data RAM segments. Instructions
such as MOV LPL,R, MOV LPH,R, MOV @LP,R, and MOV R,@LP are used to control the LCD data
RAM. The data in the LCD data RAM are transferred to the segment output pins automatically without
program control. When the bit value of the LCD data RAM is "1," the LCD is turned on. When the bit
value of the LCD data RAM is "0," LCD is turned off. The contents of the LCD data RAM (LCDR) are
sent out through the segment0 to segment39 pins by a direct memory access. The relation between
the LCD data RAM and segment/common pins is shown below.
Table 6 The relation between the LCDR and segment/common pins used as LCD drive output pins
COM3
COM2
COM1
COM0
LCD DATA RAM
OUTPUT PIN
BIT 3
BIT 2
BIT 1
BIT 0
LCDR00
SEG0
0/1
0/1
0/1
0/1
LCDR01
SEG1
0/1
0/1
0/1
0/1
:
:
:
:
:
:
:
:
:
:
:
:
LCDR26
SEG38
0/1
0/1
0/1
0/1
LCDR27
SEG39
0/1
0/1
0/1
0/1
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