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參數資料
| 型號： | W742C810 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT MICROCONTROLLER |
| 中文描述： | 4-BIT, MROM, 3.58 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 2.75 MM HEIGHT, QFP-100 |
| 文件頁數： | 21/42頁 |
| 文件大小： | 501K |
| 代理商： | W742C810 |
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Preliminary W742C810
Publication Release Date: May 1999
- 21 -
Revision A1
HEF.3 is reserved.
HEF.4 = 1 Overflow from the Divider 1 causes Hold mode to be released.
HEF.5 & HEF.6 are reserved.
HEF.7 = 1 Underflow from Timer 1 causes Hold mode to be released.
6.15.2 Interrupt Enable Flag (IEF)
The interrupt enable flag is organized as an 8-bit binary register (IEF.0 to IEF.7). These bits are used
to control the interrupt conditions. It is controlled by the MOV IEF, #I instruction. When one of these
interrupts is accepted, the corresponding bit of the event flag will be reset, but the other bits are
unaffected. In interrupt subroutine, these interrupts will be disabled till the instruction MOV IEF, #I or
EN INT is executed again. Otherwise, these interrupts can be disabled by executing DIS INT
instruction. The bit descriptions are as follows:
w
1
2
3
IEF
4
w
w
5
6
0
w
w
7
Note: W means write only.
IEF.0 = 1 Interrupt 0 is accepted by overflow from the Divider 0.
IEF.1 = 1 Interrupt 1 is accepted by underflow from the Timer 0.
IEF.2 = 1 Interrupt 2 is accepted by a signal change at port RC.
IEF.3 is reserved.
IEF.4 = 1 Interrupt 0 is accepted by overflow from the Divider 1.
IEF.5 & IEF.6 are reserved.
IEF.7 = 1 Interrupt 7 is accepted by underflow from Timer 1.
6.15.3 Port Enable Flag (PEF)
The port enable flag is organized as a 4-bit binary register (PEF.0 to PEF.3). Before port RC may be
used to release the hold mode or preform interrupt function, the content of the PEF must be set first.
The PEF is controlled by the MOV PEF, #I instruction. The bit descriptions are as follows:
PEF
w
w
w
0
1
2
w
3
Note: W means write only.
PEF.0: Enable/disable the signal change at pin RC.0 to release hold mode or perform interrupt.
PEF.1: Enable/disable the signal change at pin RC.1 to release hold mode or perform interrupt.
PEF.2: Enable/disable the signal change at pin RC.2 to release hold mode or perform interrupt.
PEF.3: Enable/disable the signal change at pin RC.3 to release hold mode or perform interrupt.
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