
Preliminary W742C810
Publication Release Date: May 1999
- 23 -
Revision A1
6.16 Reset Function
The W742C810 is reset either by a power-on reset or by using the external RES pin. The initial state
of the W742C810 after the reset function is executed is described below.
Program Counter (PC)
TM0, TM1
MR0, MR1, PAGE registers
PSR0, SCR registers
IEF, HEF, HCF, PEF, EVF, SEF flags
WRP, DBKR register
Timer 0 input clock
Timer 1 input clock
MFP output
DTMF output
Input/output ports RA,RB, RD
Output port RE & RF
RA, RB & RD ports output type
RC ports pull-high resistors
Input clock of the watchdog timer
LCD display
000H
Reset
Reset
Reset
Reset
Reset
F
OSC
/4
F
OSC
Low
Hi-Z
Input mode
High
CMOS type
Disable
F
OSC
/2048
OFF
Table 3 The initial state after the reset function is executed
6.17 Input/Output Ports RA, RB & RD
Port RA consists of pins RA.0 to RA.3. Port RB consists of pins RB.0 to RB.3. Port RD consists of
pins RD.0 to RD.3. At initial reset, input/output ports RA, RB and RD are all in input mode. When RA,
RB are used as output ports, CMOS or NMOS open drain output type can be selected by the PM0
register. But when RD is used as output port, the output type is just fixed to be CMOS output type.
Each pin of port RA, RB and RD can be specified as input or output mode independently by the PM1,
PM2 and PM5 registers. The MOVA R, RA or MOVA R, RB or MOVA R, RD instructions operate the
input functions and the MOV RA, R or MOV RB, R or MOV RD, R operate the output functions. For
more details, refer to the instruction table and Figure 6-10 and Figure 6-11.
Input/Output Pin of the RA(RB)
I/O PIN
RA.n(RB.n)
DATA
BUS
Buffer
Output
PM0.0(PM0.1)
PM1.n (PM2.n)
MOVA R,RA(MOVA R,RB) instruction
MOV RA,R(MOV RB,R)
instruction
Enable
Enable
Figure 6-10 Architecture of RA (RB) Input/Output Pins