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參數資料
| 型號： | W79E648 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | Fast 8051 Compatible microcontroller with a redesigned Processor |
| 中文描述： | 快速8051兼容微控制器重新設計的處理器 |
| 文件頁數： | 16/80頁 |
| 文件大小： | 407K |
| 代理商： | W79E648 |
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Preliminary W79E648
- 16 -
P4.0 Base Address Low Byte Register
Bit:
7
A7
6
A6
5
A5
4
A4
3
A3
2
A2
1
A1
0
A0
Mnemonic: P40AL
Address: 94h
P4.0 Base Address High Byte Register
Bit:
7
6
5
4
3
2
1
A9
0
A8
A15
A14
A13
A12
A11
A10
Mnemonic: P40AH
Address: 95h
P4.1 Base Address Low Byte Register
Bit:
7
A7
6
A6
5
A5
4
A4
3
A3
2
A2
1
A1
0
A0
Mnemonic: P41AL
Address: 96h
P4.1 Base Address High Byte Register
Bit:
7
6
5
4
3
2
1
A9
0
A8
A15
A14
A13
A12
A11
A10
Mnemonic: P41AH
Address: 97h
Serial Port Control
Bit:
7
6
5
4
3
2
1
TI
0
RI
SM0/FE
SM1
SM2
REN
TB8
RB8
Mnemonic: SCON
Address: 98h
SM0/FE: Serial port 0, Mode 0 bit or Framing Error Flag: The SMOD0 bit in PCON SFR determines
whether this bit acts as SM0 or as FE. The operation of SM0 is described below. When
used
as FE, this bit will be set to indicate an invalid stop bit. This bit must be manually cleared in
software to clear the FE condition.
SM1:
Serial port Mode bit 1:
SM0 SM1 Mode
0
0
1
1
Description
Synchronous
Asynchronous 10
Asynchronous 11
Asynchronous 11
Length
8
Baud rate
4/12 Tclk
Variable
64/32 Tclk
Variable
0
1
0
1
0
1
2
3
SM2:
Multiple processors communication. Setting this bit to 1 enables the multiprocessor
communication feature in mode 2 and 3. In mode 2 or 3, if SM2 is set to 1, then RI will not be
activated if the received 9th data bit (RB8) is 0. In mode 1, if SM2 = 1, then RI will not be
activated if a valid stop bit was not received. In mode 0, the SM2 bit controls the serial port
clock. If set to 0, then the serial port runs at a divide by 12 clock of the oscillator. This gives
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