- 您現在的位置：買賣IC網 > PDF目錄363901 > W79E648 (WINBOND ELECTRONICS CORP) Fast 8051 Compatible microcontroller with a redesigned Processor PDF資料下載
參數資料
| 型號： | W79E648 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | Fast 8051 Compatible microcontroller with a redesigned Processor |
| 中文描述： | 快速8051兼容微控制器重新設計的處理器 |
| 文件頁數： | 38/80頁 |
| 文件大小： | 407K |
| 代理商： | W79E648 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁當前第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
Preliminary W79E648
- 38 -
The Timer 0 and 1 Interrupts are generated by the TF0 and TF1 flags. These flags are set by the
overflow in the Timer 0 and Timer 1. The TF0 and TF1 flags are automatically cleared by the
hardware when the timer interrupt is serviced. The Timer 2 interrupt is generated by a logical OR of
the TF2 and the EXF2 flags. These flags are set by overflow or capture/reload events in the timer 2
operation. The hardware does not clear these flags when a timer 2 interrupt is executed. Software has
to resolve the cause of the interrupt between TF2 and EXF2 and clear the appropriate flag.
The Watchdog timer can be used as a system monitor or a simple timer. In either case, when the
time-out count is reached, the Watchdog timer interrupt flag WDIF (WDCON.3) is set. If the interrupt is
enabled by the enable bit EIE.4, then an interrupt will occur.
All the bits that generate interrupts can be set or reset by hardware, and thereby software initiated
interrupts can be generated. Each of the individual interrupts can be enabled or disabled by setting or
clearing a bit in the IE SFR. IE also has a global enable/disable bit EA, which can be cleared to
disable all the interrupts.
Priority Level Structure
There are three priority levels for the interrupts, highest, high and low. The interrupt sources can be
individually set to either high or low levels. Naturally, a higher priority interrupt cannot be interrupted
by a lower priority interrupt. However there exists a pre-defined hierarchy amongst the interrupts
themselves. This hierarchy comes into play when the interrupt controller has to resolve simultaneous
requests having the same priority level. This hierarchy is defined as shown below; the interrupts are
numbered starting from the highest priority to the lowest.
Table 7. Priority structure of interrupts
Source
Flag
Vector Address
Priority level
External Interrupt 0
IE0
0003h
1(highest)
Timer 0 Overflow
TF0
000Bh
2
External Interrupt 1
IE1
0013h
3
Timer 1 Overflow
TF1
001Bh
4
Serial Port
RI + TI
0023h
5
Timer 2 Overflow
TF2 + EXF2
002Bh
6
Watchdog Timer
WDIF
0063h
7 (lowest)
相關PDF資料 |
PDF描述 |
|---|---|
| W79E802 | 8-BIT MICROCONTROLLER |
| W79E802A | 8-BIT MICROCONTROLLER |
| W79E802ADG | 8-BIT MICROCONTROLLER |
| W79E802ASG | 8-BIT MICROCONTROLLER |
| W79E803 | 8-BIT MICROCONTROLLER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W79E658A40FL | 制造商:Nuvoton Technology Corp 功能描述:IC MCU 8BIT 100QFP |
| W79E659A40FL | 制造商:Nuvoton Technology Corp 功能描述:IC MCU 8BIT 100QFP |
| W79E802 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8-BIT MICROCONTROLLER |
| W79E802A | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8-BIT MICROCONTROLLER |
| W79E802ADG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8-BIT MICROCONTROLLER |
發布緊急采購，3分鐘左右您將得到回復。