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參數(shù)資料
| 型號(hào)： | W79E648 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | Fast 8051 Compatible microcontroller with a redesigned Processor |
| 中文描述： | 快速8051兼容微控制器重新設(shè)計(jì)的處理器 |
| 文件頁數(shù)： | 17/80頁 |
| 文件大小： | 407K |
| 代理商： | W79E648 |
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Preliminary W79E648
Publication Release Date: 05/31/2004
- 17 - Revision A1
compatibility with the standard 8052. When set to 1, the serial clock become divide by 4 of the
oscillator clock. This results in faster synchronous serial communication.
Receive enable: When set to 1 serial reception is enabled, otherwise reception is disabled.
This is the 9th bit to be transmitted in modes 2 and 3. This bit is set and cleared by software
as desired.
In modes 2 and 3 this is the received 9th data bit. In mode 1, if SM2 = 0, RB8 is the stop bit
that was received. In mode 0 it has no function.
Transmit interrupt flag: This flag is set by hardware at the end of the 8th bit time in mode 0, or
at the beginning of the stop bit in all other modes during serial transmission. This bit must be
cleared by software.
Receive interrupt flag: This flag is set by hardware at the end of the 8th bit time in mode 0, or
halfway through the stop bits time in the other modes during serial reception. However the
restrictions of SM2 apply to this bit. This bit can be cleared only by software.
REN:
TB8:
RB8:
TI:
RI:
Serial Data Buffer
Bit:
7
6
5
4
3
2
1
0
SBUF.7 SBUF.6 SBUF.5 SBUF.4 SBUF.3 SBUF.2 SBUF.1 SBUF.0
Mnemonic: SBUF
Address: 99h
SBUF.7-0: Serial data on the serial port 0 is read from or written to this location. It actually consists of
two separate internal 8-bit registers. One is the receive resister, and the other is the
transmit buffer. Any read access gets data from the receive data buffer, while write access
is to the transmit data buffer.
P4.2 Base Address Low Byte Register
Bit:
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
Mnemonic: P42AL
Address: 9Ah
P4.2 Base Address High Byte Register
Bit:
7
6
5
4
3
2
1
0
A15
A14
A13
A12
A11
A10
A9
A8
Mnemonic: P42AH
Address: 9Bh
P4.3 Base Address Low Byte Register
Bit:
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
Mnemonic: P43AL
Address: 9Ch
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