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參數資料
| 型號： | W79E648 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | Fast 8051 Compatible microcontroller with a redesigned Processor |
| 中文描述： | 快速8051兼容微控制器重新設計的處理器 |
| 文件頁數： | 26/80頁 |
| 文件大小： | 407K |
| 代理商： | W79E648 |
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Preliminary W79E648
- 26 -
Timer 2 MSB
Bit:
7
6
5
4
3
2
1
0
TH2.7
TH2.6
TH2.5
TH2.4
TH2.3
TH2.2
TH2.1
TH2.0
Mnemonic: TH2
Address: CDh
TH2:
Timer 2 MSB
Program Status Word
Bit:
7
6
5
F0
4
3
2
1
F1
0
P
CY
AC
RS1
RS0
OV
Mnemonic: PSW
Address: D0h
CY:
Carry flag: Set for an arithmetic operation which results in a carry being generated from the
ALU. It is also used as the accumulator for the bit operations.
Auxiliary carry: Set when the previous operation resulted in a carry from the high order nibble.
User flag 0: General purpose flag that can be set or cleared by the user.
RS.1-0: Register bank select bits:
RS1 RS0
Register bank
0
0
0
0
1
1
1
0
2
1
1
3
AC:
F0:
Address
00-07h
08-0Fh
10-17h
18-1Fh
OV:
Overflow flag: Set when a carry was generated from the seventh bit but not from the 8th bit as
a result of the previous operation, or vice-versa.
User Flag 1: General purpose flag that can be set or cleared by the user by software.
Parity flag: Set/cleared by hardware to indicate odd/even number of 1's in the accumulator.
F1:
P:
Watchdog Control
Bit:
7
-
6
5
-
4
-
3
2
1
0
POR
WDIF
WTRF
EWT
RWT
Mnemonic: WDCON
Address: D8h
POR: Power-on reset flag. Hardware will set this flag on a power up condition. This flag can be read
or written by software. A write by software is the only way to clear this bit once it is set.
WDIF: Watchdog Timer Interrupt Flag. If the watchdog interrupt is enabled, hardware will set this bit
to indicate that the watchdog interrupt has occurred. If the interrupt is not enabled, then this bit
indicates that the time-out period has elapsed. This bit must be cleared by software.
WTRF: Watchdog Timer Reset Flag. Hardware will set this bit when the watchdog timer causes a
reset. Software can read it but must clear it manually. A power-fail reset will also clear the bit.
This bit helps software in determining the cause of a reset. If EWT = 0, the watchdog timer
will have no affect on this bit.
EWT: Enable Watchdog timer Reset. Setting this bit will enable the Watchdog timer Reset function.
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