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參數(shù)資料
| 型號： | W9320 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 編解碼器 |
| 英文描述： | ADPCM Codec(ADPCM編解碼器) |
| 中文描述： | A/MU-LAW, ADPCM CODEC |
| 文件頁數(shù)： | 20/35頁 |
| 文件大小： | 444K |
| 代理商： | W9320 |
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W9320
- 20 -
8.2.6.
Byte Register 5 (BR5)
This register holds the parameters for noise burst detection and the tone generator. The noise burst
detection and tone generator modes are enabled through the BR7(b3) register. All bits are cleared
when the PDI/RESET pin is set to logic zero
.
B7
B6
B5
B4
B3
B2
B1
B0
BR5
NB Thd[7]/
ToneAddr[1]
r/w
NB Thd[6]/
ToneAddr[0]
r/w
NB Thd[5]/
Don Care
r/w
NB Thd[4]/
Don Care
r/w
NB Thd[3]/
TonePar[11]
r/w
NB Thd[2]/
TonePar[10]
r/w
NB Thd[1]/
TonePar[9]
r/w
NBThd[0]/
TonePar[8]
r/w
Noise Burst Detect Threshold[7:0] (b7:b0):
When the device is in the noise burst detection mode (i.e. BR7[b3] = 0 and BR7[b6] = 1) these eight
bits contain the threshold for noise burst detection. The detected algorithm use the frequency value to
decide whether the noise is present or not. We suggest a threshold value greater than 80 (to be
written in decimal format, i.e. 4 KHz above).
Tone Generator Address[1:0](b7:b6):
When the tone generator is enabled, (i.e. BR7[b3] = 1), these two bits can be programmed to select
the frequency or attenuation factor as shown in Table 8-6.
Tone Generator Parameters[11:8](b3:b0):
These four bits contain the four LSB frequencies or tone generator attenuation coefficients. The tone
generator is enabled when the BR7 (b3) register is set to 1. The last eight LSBs are placed in the
BR4[b7:b0] register. Switching between the frequency and attenuation factor is determined by bit 7
and bit 6.
TONE ADDRESS[1] (B7)
0
0
1
1
TONE ADDRESS[0] (B6)
0
1
0
1
TONE PARAMETER SELECTION
Frequency of Tone 1
Attenuation of Tone 1
Frequency of Tone 2
Attenuation of Tone 2
Table 8-6 Tone generator Address Parameters
8.2.7
Byte Register 6 (BR6)
B7
B6
B5
B4
B3
B2
B1
B0
BR6
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
This register is reserved. The user should not read or write to this register.
8.2.8. Byte Register 7 (BR7)
This register is used to enable noise burst detection and the tone generator. Additional options include
2/6 frame delay and writing ready status for the BR4 and BR5 registers. All bits are cleared when the
PDI/RESET pin is set to logic zero.
B7
B6
B5
2/6
Delay
B4
B3
B2
B1
B0
BR7
Ready for
BR4 &
BR5
ro
NB Detect
Enable
ro/wo
r/w
Don
t
Care
Tone Gen.
Enable
r/w
Reserved
Tone1
Enable
r/w
Tone 2
Enable
r/w
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