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參數(shù)資料
| 型號： | W9320 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 編解碼器 |
| 英文描述： | ADPCM Codec(ADPCM編解碼器) |
| 中文描述： | A/MU-LAW, ADPCM CODEC |
| 文件頁數(shù)： | 22/35頁 |
| 文件大?。?/td> | 444K |
| 代理商： | W9320 |
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W9320
- 22 -
Software Decoder Reset (b6):
Setting this bit forces the device to execute the ADPCM decoder initialization every time the decoder
receives an interrupt.
Linear Codec Mode (b5):
Setting this bit forces the device to perform as an 8 bit linear codec. The 6 LSB linear A/D converted
output from the
Σ
codec-filter will be truncated in this mode.
HPF Disable (b4):
Setting this bit will disable the high pass filter (HPF) in the transmit path for applications such as
battery test mode in BR0[b4:b3] = "1"
.
Reserved (b3:b0):
These bits are reserved and should not be used by the user.
CAUTION: Reserved bits (b3:b0) must be set to zero at all times for normal operation.
8.2.10.
Byte Register 9 (BR9)
B7
B6
B5
B4
B3
B2
B1
B0
BR9
Tx Log
PCM[7]/
Linear
PCM[13]
ro/wo
Tx Log
PCM[6]/
Linear
PCM[12]
ro/wo
Tx Log
PCM[5]/
Linear
PCM[11]
ro/wo
Tx Log
PCM[4]/
Linear
PCM[10]
ro/wo
Tx Log
PCM[3]/
Linear
PCM[9]
ro/wo
Tx Log
PCM[2]/
Linear
PCM[8]
ro/wo
Tx Log
PCM[1]/
Linear
PCM[7]
ro/wo
Tx Log
PCM[0]/
Linear
PCM[6]
ro/wo
This register contains the PCM value of the transmit path. If the PCM value comes from the transmit
path of the
Σ
codec-filter, then BR9 may be internally written into the most siginificant bits of the 14
bit linear PCM (b13:b6). If the device is for applications such as CCITT test mode i.e. BR0[b4:b3] =
"0" then BR9 may read the companding Log-PCM from an external micro-controller to be used for the
ADPCM encoder. In the 14 bit linear mode, the 8 MSB are stored into this register and the left 6 LSB
will be placed in BR10[b7:b2]. See the description of BR10 for more details. Note that this register is
read-only/write-only.
8.2.11. Byte Register 10 (BR10)
B7
B6
B5
B4
B3
B2
B1
B0
BR10
Encoder
Linear
PCM[5]
ro
Encoder
Linear
PCM[4]
ro
Encoder
Linear
PCM[3]
ro
Encoder
Linear
PCM[2]
ro
Encoder
Linear
PCM[1]
ro
Encoder
Linear
PCM[0]
ro
Reserved
Reserved
This register contains the 6 LSB of the linear PCM value for the transmit path. The PCM value must
come from the transmit path of the
Σ
codec-filter and not from an external micro-controller. The left
8 MSB are stored into BR9[b7:b0]. See the description of BR9 for more details. Note that this register
is read-only.
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