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參數資料
| 型號： | W66910CD |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | TE Mode ISDN S/T-Controller with Microprocessor Interface |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 MM, 1.40 MM HEIGHT, QFP-100 |
| 文件頁數： | 58/81頁 |
| 文件大小： | 681K |
| 代理商： | W66910CD |
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Data Sheet
W66910 PCI ISDN S/T-Controller
Publication Release Date:
Feb,2001
Revision 1.0
-58 -
MDR0
Monitor channel 0 Data Receive
MER0
Monitor channel 0 End of Reception
MDA0
Monitor channel 0 Data Acknowledged
The remote end has acknowledged the Monitor byte being transmitted.
MAB0
Monitor channel 0 Data Abort
8.1.31 Monitor Channel 0 Control Register
Value after reset: 00H
7
6
5
0
0
0
MRIE0 Monitor Channel 0 Receive Interrupt Enable
Monitor channel interrupt status MDR0, MER0 generation is enabled (1) or masked (0).
MRC0 MR Bit Control
Determines the value of the MR bit:
0: MR bit always 1. In addition, the MDR0 interrupt is blocked, except for the first byte of a packet (if MRIE0=1).
1: MR internally controlled by the W66910 according to Monitor channel protocol. In addition, the MDR0 interrupt
is enabled for all received bytes according to the Monitor channel protocol (if MRIE0=1).
MXIE0 Monitor channel 0 Transmit Interrupt Enable
Monitor interrupt status MDA0, MAB0 generation is enabled (1) or masked (0).
MXC0 MX bit Control
Determines the value of the MX bit:
0: MX always 1.
1: MX internally controlled by the W66910 according to Monitor channel protocol.
MO0C
Read/Write Address 1EH
4
0
3
2
1
0
MRIE0
MRC0
MXIE0
MXC0
8.1.32 GCI Mode Control/Status Register
Value after reset: 00H
7
6
5
MAC0
MAC1
GACT
GCR Read/Write Address 1FH
4
3
2
1
0
TLP
GRLP
SPU
PD
GMODE
MAC0 Monitor Transmit Channel 0 Active (Read Only)
Data transmission is in progress in GCI mode Monitor channel 0.
0: the previous transmission has been terminated. Before starting a transmission, the microprocessor should verify
hat the transmitter is inactive.
1: after having written data into the Monitor Transmit Channel 0 (MO0X) register, the microprocessor sets this bit to 1.
This enables the MX bit to go active (0), indicating the presence of valid Monitor channel data (contents of MOX) in
he correspond frame.
相關PDF資料 |
PDF描述 |
|---|---|
| W6691 | ISDN S/T Interface Transceiver |
| W6691CD | ISDN S/T Interface Transceiver |
| W6691CP | ISDN S/T Interface Transceiver |
| W6692 | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| W6693A | USB Bus ISDN S/T Interface Controller(USB總線的ISDN S/T接口控制器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W6691CD | 制造商:WINBOND 制造商全稱:Winbond 功能描述:ISDN S/T Interface Transceiver |
| W6691CP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:ISDN S/T Interface Transceiver |
| W6692 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:PCI Bus ISDN S/T-Controller |
| W6692A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with PCI 2.2 Interface and ACPT |
| W6692ACD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
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