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參數資料
型號: W942516CH
廠商: WINBOND ELECTRONICS CORP
英文描述: 4M X 4 BANKS X 16 BIT DDR SDRAM
中文描述: 4米× 4銀行× 16位DDR SDRAM
文件頁數: 21/47頁
文件大小: 2809K
代理商: W942516CH
W942516CH
Publication Release Date: May 20, 2003
- 21 -
Revision A2
9. FUNCTIONAL DESCRIPTION
9.1 Power Up Sequence
(1) Apply power and attempt to CKE at a low state (
0.2V), all other inputs may be undefined
1) Apply V
DD
before or at the same time as V
DDQ
.
2) Apply V
DDQ
before or at the same time as V
TT
and V
REF
.
(2) Start Clock and maintain stable condition for 200
μ
S (min.).
(3) After stable power and clock, apply NOP and take CKE high.
(4) Issue EMRS (Extended Mode Register Set) to enable DLL and establish Output Driver Type.
(5) Issue MRS (Mode Register Set) to reset DLL and set device to idle with bit A8.
(an additional 200 cycles(min) of clock are required for DLL Lock)
(6) Issue precharge command for all banks of the device.
(7) Issue two or more Auto Refresh commands.
(8) Issue MRS-Initialize device operation.
(If device operation mode is set at sequence 5, sequence 8 can be skipped.)
9.2 Command Function
1. Bank Activate Command
(
RAS
= "L",
CAS
= "H",
WE
= "H", BS0, BS1 = Bank, A0 to A12 = Row Address)
The Bank Activate command activates the bank designated by the BS (Bank address) signal. Row
addresses are latched on A0 to A12 when this command is issued and the cell data is read out of
the sense amplifiers. The maximum time that each bank can be held in the active state is specified
as t
RAS (max)
. After this command is issued, Read or Write operation can be executed.
2. Bank Precharge Command
(
RAS
= "L",
CAS
= "H",
WE
= "L", BS0, BS1 = Bank, A10 = "L", A0 to A9, A11, A12 = Don’t
care)
The Bank Precharge command percharges the bank designated by BS. The precharged bank is
switched from the active state to the idle state.
3. Precharge All Command
(
RAS
= "L",
CAS
= "H",
WE
= "L", BS0, BS1 = Don’t care, A10 = "H", A0 to A9, A11, A12 =
Don’t care)
The Precharge All command precharges all banks simultaneously. Then all banks are switched to
the idle state.
4. Write Command
(
RAS
= "H",
CAS
= "L",
WE
= "L", BS0, BS1 = Bank, A10 = "L", A0 to A9, A11 = Column
Address)
相關PDF資料
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W946432AD 512K X 4 BANKS X 32 BITS DDR SDRAM
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