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參數資料
| 型號： | W53342 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 60" Voice/Melody/LCD Controller(60”話音/音樂/LCD控制器) |
| 中文描述： | 4-BIT, MROM, MICROCONTROLLER |
| 文件頁數： | 24/65頁 |
| 文件大小： | 719K |
| 代理商： | W53342 |
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W53322/W53342
- 24 -
Input/Output Pin of the RA & RB
I/O PIN
RAn & RBn
DATA
BUS
RA_NM
(PM0.0)
RAnIN
(PM1.n)
MOVA R, PORTA (MOVA R, RORTB) instruction
MOV PORTA, R
(MOV PORTB, R)
instruction
Buffer
Output
Enable
Enable
RBnIN
(PM2.n)
RB_NM
(PM0.1)
&
&
Figure 10. Architecture of RA ( RB) Input/Output Pins
Input Ports RC, RD
Port RC consists of pins RC0 to RC3, and port RD consists of pins RD0 to RD3. Each pin of port RC and port RD can be
connected to a pull-up resistor, which is controlled by the port mode 0 register (PM0). When the PEF, HEF, and IEF
corresponding to the RC ( RD ) port are set, a statel change at the specified pins of port RC ( RD) will execute the hold
mode release or interrupt subroutine. Port status register 0 and 1 (PSR0, PSR1 ) record the signal changing status on the
port RC and RD. PSR0(PSR1) can be read out and cleared by the MOVA R, PSR0( MOVA R, PSR0 ) and CLR PSR0 (
CLR PSR1) instructions.
Refer to Figure 11 and the instruction sets for more details.
Port Enable Flag for hold mode (PEFL, PEFH with SR=14H, 15H)
The port enable flag is organized as 8-bit binary register (PEF.0 to PEF.7) that PEFL and PEFH registers store
PEF.0~PEF.3 and PEF.4~PEF.7 separately. PEFL controls port RC status, and PEFH is responsible port RD status.
Before port RC, RD may be used to release the hold mode or preform interrupt function, the content of the PEF must be
set first. If PEF is wirtten to "1", the function will be enable. The PEF is controlled by the MOV PEF, #I instruction with 8
bit immediate data. Both MOV PEFH,#I and MOV PEFH,#I can also be used with 4 bit immediate data. The bit
descriptions are as follows:
2
3
PEF
RD1
RD0
RD3
RC2
RC3
RD2
0
1
7
6
5
4
PEFH
PEFL
RC0
RC1
PEF.0 =1 : State change on pin RC0 to release hold mode or perform interrupt
PEF.1 =1 : State change on pin RC1 to release hold mode or perform interrupt
PEF.2 =1 : State change on pin RC2 to release hold mode or perform interrupt
PEF.3 =1 : State change on pin RC31 to release hold mode or perform interrupt
PEF.4 =1 : State change on pin RD0 to release hold mode or perform interrupt
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| W536060A | VOICE/ MELODY / LCD CONTROLLER |
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相關代理商/技術參數 |
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|---|---|
| W5339 | 制造商:Tamura Corporation of America 功能描述: |
| W53481132SARC | 制造商:Winslow Adaptics Ltd 功能描述:32 way 1 row through board socket,1.27mm |
| W53482120SARC | 制造商:Winslow Adaptics Ltd 功能描述:20 way 2 row through board socket,1.27mm |
| W53482140SARC | 制造商:Winslow Adaptics Ltd 功能描述:40 way 2 row through board socket,1.27mm |
| W53482180SARC | 制造商:Winslow Adaptics Ltd 功能描述:80 way 2 row through board socket,1.27mm |
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