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參數(shù)資料
型號(hào)： W53342
廠商： WINBOND ELECTRONICS CORP
元件分類： 微控制器/微處理器
英文描述： 60" Voice/Melody/LCD Controller(60”話音/音樂/LCD控制器)
中文描述： 4-BIT, MROM, MICROCONTROLLER
文件頁數(shù)： 31/65頁
文件大?。?/td> 719K
代理商： W53342
W53322/W53342
Publication Release Date: March 1999
- 31 -
Revision A2
PART C: LCD FUNCTION
The W53322/W53342 can directly drive an LCD panel with 32 common output pins and 48/64 segment output
pins for a total of 32
×
48/64 dots and the frame updating rate is 64 Hz. Two registers LCDM1 and LCDM2 can use to
select different LCD operating type such as duty cycle, bias ratio, maximun pump voltage, internal shunt resistor and
enable LCD pump voltage circuit by instruction MOV LCDM1, #I ; MOV LCDM1, RL (where RL is thelow 9 bit of RAM
address ) and MOV LCDM1, ACC. For power saving issue, LCDEN bit (bit 1 of MR0 register) can select LCD panel
on or off ; it is controlled by the LCDON and LCDOFF instructions. The LCDON instruction turns the LCD display on
(even in HOLD mode), and the LCDOFF instruction turns the LCD display off. At initial reset, the LCDM1 is 0000B that
LCD operating condition is 1/32 duty, 1/7 bias, triple pump voltage with internal shunt resistor, and all the LCD segments
are lit. When the initial reset state ends, the LCD display is turned off automatically. The circuit architecture is shown as
Figure 14. Many different application condition are shown from Figure 15 to 22.
Commom
Driver
Segment
Driver
COM0 to 31
SEG0 to 31/47/63
LCDM1 Register
F
LCD
LCD Shunt
Resistor
V2 to V6
INTSRB (LCDM1.0)
COM32B
(LCDM1.3)
Clock
Generator
Fs
DH1
DH2
VDD2
VDD3
LCD PUMP
Voltage
BIAS7B(LCDM1.2)
LCD Data RAM
(32 x 32/48/64 bits)
Data Bus
MOV R, #I
Instruction
VLCDEXT
(LCDM2.3)
LCDEN(MR0.1)
PMPV3B
(LCDM1.1)
Figure 14. LCD Driver Circuit Diagram
LCD pattern RAM (LCDR000H~LCDR0FFH/LCDR17FH/LCDR1FFH)
Corresponding to the 48/64 LCD drive output pins, there are 384/512 LCD data RAM from 200H to 37FH/3FFH or named
as LCDR000H to LCDR17FH/LCDR1FFH. In fact, they are also general purpose RAM, all the operatin instruction is
same as RAM area 00H~1FFH . But instructions such as MOV LCDR,#I, MOV WR, LCDR ; MOV LCDR,WR and
MOV LCDR, ACC are also available to control the LCD data RAM because LCDR will be added 1FFH in cross
assembler automatically. When the bit value of the LCD data RAM is written "1" , the LCD dot is turned on. Otherwise
LCD dot is turnned off if RAM bit data is written "0". The contents of the LCD data RAM (LCDR) are sent out to the
SEG0~SEG47/SEG63 pins by a direct memory access. The relation between the LCD data RAM and segment/common
pins is shown Table 5
LCD DATA RAM
OUTPUT PIN
BIT3
BIT 2
BIT 1
BIT 0
LCDR000 ( RAM200 )
COM3
COM2
COM1
COM0
LCDR001 ( RAM201 )
COM7
COM6
COM5
COM4
LCDR002 ( RAM202 )
COM11 COM10 COM9
COM8
LCDR003 ( RAM203 )
COM15 COM14 COM13 COM12
相關(guān)PDF資料
PDF描述
W53322 60" Voice/Melody/LCD Controller(60”話音/音樂/LCD控制器)
W536030A VOICE/ MELODY / LCD CONTROLLER
W536060A VOICE/ MELODY / LCD CONTROLLER
W536090A VOICE/ MELODY / LCD CONTROLLER
W536030P VOICE & MELODY CONTROLLER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W5339 制造商:Tamura Corporation of America 功能描述:
W53481132SARC 制造商:Winslow Adaptics Ltd 功能描述:32 way 1 row through board socket,1.27mm
W53482120SARC 制造商:Winslow Adaptics Ltd 功能描述:20 way 2 row through board socket,1.27mm
W53482140SARC 制造商:Winslow Adaptics Ltd 功能描述:40 way 2 row through board socket,1.27mm
W53482180SARC 制造商:Winslow Adaptics Ltd 功能描述:80 way 2 row through board socket,1.27mm
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