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參數(shù)資料
型號(hào)： W53342
廠商： WINBOND ELECTRONICS CORP
元件分類： 微控制器/微處理器
英文描述： 60" Voice/Melody/LCD Controller(60”話音/音樂(lè)/LCD控制器)
中文描述： 4-BIT, MROM, MICROCONTROLLER
文件頁(yè)數(shù)： 29/65頁(yè)
文件大?。?/td> 719K
代理商： W53342
W53322/W53342
Publication Release Date: March 1999
- 29 -
Revision A2
Figure 12. Speech Circuit Diagram
Speech Section Register (SPCL, SPCH with SR=1E, 1F)
The SPCH and SPCL registers named as SPC.7 ~SPC.0 define the speech section that the speech synthesizer is
required to play. The SPCH represents the high nibble SPC.7 ~ SPC.4 while the SPCL represents the low nibble SPC.3
~ SPC.0 . When the speech synthesizer is actived, it plays the voice section pointed by the SPC.7~SPC.0 with maximun
255 sections (01h to FFh). If the content of the SPC register is set to 0, a speech-play command becomes a speech-stop
command.
3
7
6
5
4
SPC
0
1
2
SPC.5
SPCH
SPCL
SPC.4
SPC.7
SPC.2
SPC.3
SPC.1
SPC.6
SPC.0
Melody Function
There are 1k notes (22 bits per note) dedicated ROM for dual tone melody code , can be separated as 31 different scores
maximun. Uc controls the dual tone melody by the same methodology as speech playing. The melody scores can be write
to MLDH, MLDL register. Then MLD_play is enable high to play melody, and the MLD_busy bit will be changed from low
to high and keeps high till melody play is ending. If interrupt flag or hold mode flag IEF.6, HEF.6, HCF.6 are set, interrupt
or hold mode release will be processed while MLD_busy falling edge occurred. The MLDH, MLDL will be latched during
MLD_play . User can select melody play mode by OSB bit (bit 2 of MLDH). In one-shot trigger mode (OSB=0) , the melody
synthesizer receives a rising edge of MLD_play then plays the score pointed by MLD5~MLD.0 and pull the voltage level
of the MLD_busy to logic 1. When the melody synthesizer finishes its tasks or it receives a rising edge of MLD_play with
the score number 00H , the melody synthesizer enters the standby mode and MLD_busy is pulled to logic 0. In level-trig
mode( OSB=1) , the melody synthesizer plays the pointed score when MLD_busy is set to 1. The MLD pointed score is
repeatedly played and the MLD_busy is pulled high until the MLD_play is cleared by user.
MLD_play
(FLAG0.1 bit)
MOV MLDL,#I
MOV MLDH, #I
4
4
MLD Register
Melody
D
CK
Q
HEF.6
IEF.6
Hold mode release (HCF.6)
Speech interrupt (INT6)
1. Reset
2. CLR EVFH,#0100B
3.MOV FLAG0,#0010B
EVF.6
R
VDD
OSB
Score
5
1
2
(MLED1,MLED0)
enable LED
Figure 13. Melody Circuit Diagram
Melody scores Register (MLDL, MLDH with SR=1CH, 1DH)
MLD register is organized by two 4-bit registers, MLDH and MLDL. The MLDH represents the high nibble of MLED1,
MLED0 , OSB, MLD.4 while the MLDL represents the low nibble MLD.3 ~ MLD.0. The MLD.4 ~ MLD.0 performs a 5-bit
pointer of scores, and MLED1~0 use to control LED1 pin active type during melody playing. When the melody synthesizer
is actived, it plays the score section pointed by the MLD.4 ~ MLD.0 . From score 01H to score 1FH, 31 scores can be
相關(guān)PDF資料
PDF描述
W53322 60" Voice/Melody/LCD Controller(60”話音/音樂(lè)/LCD控制器)
W536030A VOICE/ MELODY / LCD CONTROLLER
W536060A VOICE/ MELODY / LCD CONTROLLER
W536090A VOICE/ MELODY / LCD CONTROLLER
W536030P VOICE & MELODY CONTROLLER
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