
W53322/W53342
- 32 -
LCDR004 ( RAM204 )
SEG0
COM19 COM18 COM17 COM16
LCDR005 ( RAM205 )
COM23 COM22 COM21 COM20
LCDR006 ( RAM206 )
COM27 COM26 COM25 COM24
LCDR007 ( RAM207 )
COM31 COM30 COM29 COM28
LCDR008 ( RAM208 )
COM3
COM2
COM1
COM0
LCDR009 ( RAM209 )
COM7
COM6
COM5
COM4
LCDR00A ( RAM20A )
COM11 COM10 COM9
COM8
LCDR00B ( RAM20B )
COM15 COM14 COM13 COM12
LCDR00C ( RAM20C )
SEG1
COM19 COM18 COM17 COM16
LCDR00D ( RAM20D )
COM23 COM22 COM21 COM20
LCDR00E ( RAM20E )
COM27 COM26 COM25 COM24
LCDR00F ( RAM20F )
COM31 COM30 COM29 COM28
:
:
:
:
:
:
:
:
:
:
:
:
LCDR1F8 ( RAM3F8 )
COM3
COM2
COM1
COM0
LCDR1F9 ( RAM3F9 )
COM7
COM6
COM5
COM4
LCDR1FA ( RAM3FA )
COM11 COM10 COM9
COM8
LCDR1FB ( RAM3FB )
COM15 COM14 COM13 COM12
LCDR1FC ( RAM3FC
)
SEG63
COM19 COM18 COM17 COM16
LCDR1FD ( RAM3FD
)
COM23 COM22 COM21 COM20
LCDR1FE ( RAM3FE )
COM27 COM26 COM25 COM24
LCDR1FF ( RAM3FF )
COM31 COM30 COM29 COM28
Table5. W53342 LCD RAM mapping to segment and common output pins
LCD Mode Register 1 (LCDM1 with SR=2AH)
The LCDM1 register is organized as 4 bit LCDM1.0~LCDM1.3 that LCD duty cycle, bias ratio , pump voltage, internal
shunt resistor can be selected by instruction MOV LCDM1, #I ; MOV LCDM1, RL (where RL is thelow 9 bit of RAM
address ) and MOV LCDM1, ACC.
The COM32B defines the duty cycle . The BIAS7B controls bias ratio to match the characteristic of LCD panel. The
PMPV3B is used to choose COM/SEG output maximun voltage either doubler or tripler when the build-in LCD voltage
pump circuit is enable. The voltage tripler should be enabled for 3V operating voltage, and the voltage doubler shoule be
enabled for 4.5V operating voltage. The INTSRB is used to select the internal shunt reistoe for V2~V6 output power.
Please refer to following application circuits. The output waveforms for the five LCD driving modes are shown in Figure