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參數(shù)資料
| 型號： | W53342 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 60" Voice/Melody/LCD Controller(60”話音/音樂/LCD控制器) |
| 中文描述： | 4-BIT, MROM, MICROCONTROLLER |
| 文件頁數(shù)： | 8/65頁 |
| 文件大?。?/td> | 719K |
| 代理商： | W53342 |
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W53322/W53342
- 8 -
Data Memory (RAM)
1. Architecture
The static data memory (RAM) is arranged as maximun 512+(384/512)
×
4 bits. The data memory can be addressed
directly or indirectly. The organization of the data memory is shown in Figure 2 using W53322 as example. The first 512
nibbles RAM from 000 to 1FFH is dedicated for general data memory. Data memory from 200H to 37FH/3FFH has two
roles either LCD dedicated pattern data memory as Table 5 mapping or general data memory because they have the
same addressing capability as 000H to 1FFH. There are two data memory address point RP0 (RP0H+RP0M+RP0L) and
RP1 (RP1H+RP1M+RP1L) that programmer can use indirect addressing instruction such as MOV ACC, @RP0 or MOV
@RP1, @RP0 to move data between different data memory range and ACC. We also provide instruction between ROM
and RAM such as MOV @RP0, @LUPC that user can move look-up table data in ROM to general RAM easily. The
instruction MOV @RP0++, @LUPC++ also provides point counter is incresaed by 1 automatically after instruction is
executed. Please refer to instruction sets description for more detail.
The first sixteen addresses (00H to 3FH) in the data memory are known as the page 0 working registers. Only working
register can operate directly with immediate data. There is one special register WRPAGE from 0h to 0DH to select
working register page
2. Working Register Page (WRPAGE with SR=30H)
The special register WRPAGE is organized as a 4-bit and it counts from 0 to 0DH to separate 896 nibbles RAM as 14
pages. Every page is included 64 nibbles. The bit descriptions are as follows:
0
1
2
3
Bit 3~0: 0000~1011 Page 0 to Page 0DH
Bit3~0: 1100~1111 is inhibited.
All bits are read/write by user. At initial reset, the WRPAGE is 0000B.
R/W
R/W
R/W
R/W
WRPAGE
.
896
address
00H
4 bits
896 * 4 bits
37FH
200H
WRPAGE 0H
WRPAGE 7H
WRPAGE 8H
WRPAGE 1H
WRPAGE 0CH
WRPAGE 0DH
40H
.
.
.
.
.
.
LCD RAM
64 nibbles
64 nibbles
General RAM
.
.
Figure 2. Data Memory Organization
3. RAM Point Register (RP0L, RP0M, RP0H,, RP1L, RP1M, RP1L)
There are two RAM points 0 and 1 that user uses it to access data easily by direct or indirect addressing. RAM Point 0
(RP0) is organized as 10 bit RP0.9~RP0.0 that 3 special registers are used RP0L, RP0M and RP0H. RAM Point 1 (RP1)
has the same structure as RP0, so RP1L, RP1M and RP1H are needed.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W53322 | 60" Voice/Melody/LCD Controller(60”話音/音樂/LCD控制器) |
| W536030A | VOICE/ MELODY / LCD CONTROLLER |
| W536060A | VOICE/ MELODY / LCD CONTROLLER |
| W536090A | VOICE/ MELODY / LCD CONTROLLER |
| W536030P | VOICE & MELODY CONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W5339 | 制造商:Tamura Corporation of America 功能描述: |
| W53481132SARC | 制造商:Winslow Adaptics Ltd 功能描述:32 way 1 row through board socket,1.27mm |
| W53482120SARC | 制造商:Winslow Adaptics Ltd 功能描述:20 way 2 row through board socket,1.27mm |
| W53482140SARC | 制造商:Winslow Adaptics Ltd 功能描述:40 way 2 row through board socket,1.27mm |
| W53482180SARC | 制造商:Winslow Adaptics Ltd 功能描述:80 way 2 row through board socket,1.27mm |
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