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參數(shù)資料
型號(hào)： W88111AF
廠商： WINBOND ELECTRONICS CORP
元件分類： 存儲(chǔ)控制器/管理單元
英文描述： ATAPI CD-ROM DECODER & CONTROLLER
中文描述： IDE COMPATIBLE, CD ROM CONTROLLER, PQFP100
封裝： PLASTIC, QFP-100
文件頁(yè)數(shù)： 21/64頁(yè)
文件大小： 466K
代理商： W88111AF
W88111AF/W88112F
Preliminary/Confidential
ATAPI CD-ROM Decoder & Controller
This specification is subject to change without notice.
Publication Release Date: Aug, 1996
Preliminary/ Confidential Revision A0.1
- 21 -
DHTACK - DRAM to Host Transfer Acknowledge - (write 0Eh)
Writing DHTACK, regardless of what data is written, deactivates TENDb(0Eh.6) caused by data-
transfer-end from external RAM to the host.
STAT2 - Status Register 2 - (read 0Eh)
Bit 7-4: RMOD[3:0] - Raw Mode Bit
RMOD[2:0] are directly latched from bit 2-0 from the 4th header byte and RMOD3 is high if any
one of the other 5 bits in the mode byte is high. RMOD3 is also high if a mode byte erasure is
detected.
Bit 3: MODE2 - Mode 2 Selected Flag
This bit reflects the setting of M2RQ(0Bh.3).
Bit 2: NOCOR - No Correction
If ECC logic is enabled by bit EDCEN(0Ah.5), and QCEN(0Ah.1) or PCEN(0Ah.0), this bit
becomes high if ECC logic is interrupted the followings:
CWEN(0Bh.4) is disabled.
Mode mismatch is detected while MCRQ(0Bh.1) is enabled.
Mode erasure is detected while MCRQ(0Bh.1) is enabled. A mode erasure occurs if the
incoming C2PO flag is set for the fourth header byte, indicating unreliable mode data.
Form 2 enabled while ECC logic is set to mode 2. Form 2 blocks should not be corrected.
Form 2 can be enabled by control bit F2RQ(0Bh.2), or by the Form bit in the Subheader
byte if ACEN(0Ah.4) is enabled.
Form bit erasure while ECC logic is set to mode 2 and ACEN is enabled. A form bit erasure
is detected if the incoming C2PO flags are set for both Form bits in the Subheader bytes.
ILSYN(0Ch.6) becomes high while SDEN(0Bh.6) is enabled.
Bit 1: RFERA - Raw Form Erasure
This bit becomes high when a form bit erasure was detected. A form bit erasure is detected if the
incoming C2PO flags are set for both Form bits in the Submode bytes(bit 5 in byte 18 and 22).
RFERA becomes valid when SRIb(01h.5) becomes active-low, and remains valid until the next
block sync.
Bit 0: RFORM - Raw Form Bit
This bit is high if the Form bit is high in the Submode bytes of the incoming serial data. RFORM
becomes valid when flag SRIb(01h.5) becomes active-low, and remains valid until the next block
sync.
相關(guān)PDF資料
PDF描述
W88112F ATAPI CD-ROM DECODER & CONTROLLER
W88113C ATAPI CD-ROM DECODER & CONTROLLER
W88113CD ATAPI CD-ROM DECODER & CONTROLLER
W88113CF ATAPI CD-ROM DECODER & CONTROLLER
W88227F ATAPI CD-ROM Decoder(支持ATAPI標(biāo)準(zhǔn)的CD-ROM解碼器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W88112F 制造商:WINBOND 制造商全稱:Winbond 功能描述:ATAPI CD-ROM DECODER & CONTROLLER
W88113C 制造商:WINBOND 制造商全稱:Winbond 功能描述:ATAPI CD-ROM DECODER & CONTROLLER
W88113CD 制造商:WINBOND 制造商全稱:Winbond 功能描述:ATAPI CD-ROM DECODER & CONTROLLER
W88113CF 制造商:WINBOND 制造商全稱:Winbond 功能描述:ATAPI CD-ROM DECODER & CONTROLLER
W88611P 制造商:WINBOND 制造商全稱:Winbond 功能描述:VCD 4X RF AMP/DIGITAL SERVO & DSP
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