
W88111AF/W88112F
Preliminary/Confidential
ATAPI CD-ROM Decoder & Controller
This specification is subject to change without notice.
Publication Release Date: Aug, 1996
Preliminary/ Confidential Revision A0.1
- 44 -
Opcode 90h is written to ATA Command Register while the drive is selected.
Opcode 90h is written to ATA Command Register while the shadow drive is selected if
SHDRV (3Fh.6) if high.
MISS1 - Miscellaneous Status Register 0 - (read 2Fh)
Bit 7: SRST - Soft Reset Flag
This bit becomes high when host writes 1 to bit SRST in the ATAPI Device Control Register if
either master or slave drive is selected. When SRST becomes high, the following events will be
executed:
BSY (37h.7)
←
1
Initialize ATAPI signature
PDIAGEN (20h.6)
←
0 and disables pin PDIAGb to high-impedance state
Disable pin DASPb to high-impedance state if DASPSS (3Fh.0) is low. Negates DASPb if
DASPSS (3Fh.0) is high.
CKSTP (19h.7)
←
0
Activates host interrupt to the microprocessor if HIIEN ( 2Eh.7) is high.
HIRQ (2Eh.3)
←
0
IDE interrupt is cleared by read register ATCMD(37h) or write CLRBSY((20h.4). SRST is de-
activated by read register MISS1 (2Fh) after SRST is set to low by host.
Bit 6: ATAC - ATAPI Command
If the drive is selected, this bit becomes high when any command is written to the ATAPI
Command Register except the following opcode are received.
opcode is 90h
opcode is 08h
opcode is A0h and APKTEN (18h.7) is high
ATAC is de-activated by the following:
Chip reset or host reset
Reading register ATCMD (37h)
Writing 1 to CLRBSY (20h.4)
Bit 5: DIAG - Execute Drive Diagnostics Command
This bit becomes high if Execute Drive Diagnostics Command (opcode 90h) has been written to
either master or slave drive. Meanwhile, the following events will be executed: