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參數(shù)資料
| 型號： | W81E381D |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | FULL SPEED USB INTEGRATED MICROCONTROLLER |
| 中文描述： | FLASH, 12 MHz, MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, LQFP-48 |
| 文件頁數(shù)： | 30/63頁 |
| 文件大小： | 695K |
| 代理商： | W81E381D |
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W81E381D/W81E381AD
Publication Release Date: January 2002
- 30 - Revision 0.52
4.5.11 Register Descriptions - USB Function SFRs (E5)
RXFLG
Address: S:E5H
Reset State: X0XX 1000
Receive FIFO Flag Register (Endpoint-Indexed). These flags indicate the status of data packet in the
receive FIFO specified by EPINDEX.
7
6
5
4
-
RXFIFO
-
-
3
2
1
0
RXEMP
RXFULL
RXURF
RXOVF
Bit
Number
Bit
Mnemonic
Function
7
-
Reserved:
The value read from this bit is indeterminate. Write zero to this bit.
6
RXFIFO
Receive FIFO Index Flag (read-only):
This read-only flag indicate whether a data packet is updated after each
write to RXCNT to reflect the addition of a data packet. Likewise, the RXFIF
bit is cleared in sequence after each setting of the RXFFRC bit. The next
state table for RXFIFO bit is shown below in single packet mode.
RXFIFO
Operation
Falg
X
rev. WP
x
0
adv. WM
x
1
adv. WM
x
0
RXFFRC -->1
x
1
RXFFRC -->1
x
Next RXFIFO
unchange
1
1
0
0
Next Flag
unchange
unchange
RXOVF=1
RXURF=1
unchange
5
-
Reserved:
The value read from this bit is indeterminate. Write zero to this bit.
4
-
Reserved:
The value read from this bit is indeterminate. Write zero to this bit.
3
RXEMP
Receive FIFO Empty Flag (read-only):
Hardware sets this flag when the write pointer is as the same location as
the read pointer and the write pointer equals the write maker and neither
pointer has resoled over. Hardware clears the bit when the empty condition
no longer exists. This is not a sticky bit and always tracks the current status
of the receive FIFO, regardless of ISO or non-ISO mode.
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