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參數(shù)資料
| 型號： | W81E381D |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | FULL SPEED USB INTEGRATED MICROCONTROLLER |
| 中文描述： | FLASH, 12 MHz, MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, LQFP-48 |
| 文件頁數(shù)： | 35/63頁 |
| 文件大小： | 695K |
| 代理商： | W81E381D |
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W81E381D/W81E381AD
Publication Release Date: January 2002
- 35 - Revision 0.52
4.5.14 Register Descriptions - USB Function SFRs (F4)
TXCON
Address: S:F4H
Reset State: 0XXX 0XXXH
Transmit FIFO Control Register (Endpoint-Indexed). Controls the transmit FIFO specified by
EPINDEX.
7
6
-
5
4
3
2
1
0
TXCLR
-
-
-
-
-
-
Bit
Number
7
Bit
Mnemonic
TXCLR
Function
Transmit FIFO Clear:
Set this bit to flush the entire transmit FIFO. All flags in TXFLG revert to
their reset states (TXEMP is set; all other flags clear) and all the
read/write pointers and makers are reset. The TXISO bit in this register
and the TXSEQ bit in the TXSTAL register are not affected by this
operation. Hardware clears this bit when the flush operation is
completed.
Reserved:
The value read from this bit is indeterminate. Write zero to this bit.
Reserved:
The value read from this bit is indeterminate. Write zero to this bit.
Reserved:
The value read from this bit is indeterminate. Write zero to this bit.
Reserved:
The value read from this bit is indeterminate. Write zero to this bit.
Reserved:
The value read from this bit is indeterminate. Write zero to this bit.
Reserved:
The value read from this bit is indeterminate. Write zero to this bit.
Reserved:
The value read from this bit is indeterminate. Write zero to this bit.
6
-
5
-
4
-
3
-
2
-
1
-
0
-
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