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參數資料
| 型號： | W81E381D |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | FULL SPEED USB INTEGRATED MICROCONTROLLER |
| 中文描述： | FLASH, 12 MHz, MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, LQFP-48 |
| 文件頁數： | 39/63頁 |
| 文件大小： | 695K |
| 代理商： | W81E381D |
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W81E381D/W81E381AD
Publication Release Date: January 2002
- 39 - Revision 0.52
continued
Bit
Number
2
Bit
Mnemonic
TXFULL
Function
Transmit FIFO Full Flag (read-only):
Hardware sets this flag when the write pointer has rolled over and
equals the read pointer. Hardware clears the bit when the full condition
no longer exists. This is not a sticky bit and always tracks the current
status of the transmit FIFO, regardless of ISO or non-ISO mode.
Transmit FIFO Under-run Flag:
Hardware sets this bit when an additional byte is read from an empty
transmit FIFO or TXCNT. If the TXCNT does not agree with the data,
hardware sets TXURF. This indicates that the transmitted data was
corrupted by a bit-stuffing or CRC error. Hardware does not clear this bit,
so you must clear it in firmware. When the transmit FIFO under-runs, the
read pointer will not advance-it remains locked in the empty position.
When the bit is set, the FIFO is in an unknown state and all
transmissions are “NAK”ed. It is recommended that you reset the FIFO
in the error management routine using the TXCLR bit in the TXCON
register.
Transmit FIFO Overrun Flag:
Hardware sets this bit when firmware writes an additional byte to a full
transmit FIFO or writes a byte count to TXCNT with TXFIF0=1. This is a
sticky bit that must be cleared through firmware. When the transmit FIFO
overruns, the write pointer will not advance-it remains locked in the full
position.
Note: that when the bit is set, the FIFO is in an unknown state and all
transmissions are “NAK”ed. It is recommended that you reset the FIFO
in the error management routine using the TXCLR bit in the TXCON
register.
1
TXURF
0
TXOVF
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