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參數資料
| 型號： | W81E381D |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | FULL SPEED USB INTEGRATED MICROCONTROLLER |
| 中文描述： | FLASH, 12 MHz, MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, LQFP-48 |
| 文件頁數： | 41/63頁 |
| 文件大小： | 695K |
| 代理商： | W81E381D |
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W81E381D/W81E381AD
Publication Release Date: January 2002
- 41 - Revision 0.52
continued
Bit
Number
2
Bit
Mnemonic
TXVOID
Function
Transmit Void Condition (read-only):
A void condition has occurred in response to a valid IN token. Transmit
void is closely associated with the NAK/STALL handshake returned by
function after a valid IN token, due to the conditions that cause the
transmit FIFO to be un-enabled or not ready to transmit. Use this bit to
check any NAK/STALL handshake returned by the function. This bit
does not affect the F/HTXDx, TXERR or TXACK. This bit is set and
cleared by hardware. For non-isochronus transactions, This bit is
updated by hardware at the end of the transaction in response to a valid
IN token. For isochronous transactions, it is not updated until the next
SOF.
Transmit Error Condition (read-only):
An error condition has occurred with the transmission. Complete or
partial data has been transmitted. The error can be one of the following
conditions: 1. Data transmitted successfully but no handshake received.
2. Transmit FIFO goes into under-run condition while transmitting. The
bit is updated by hardware at the end of the data transmission (non-
isochronous) or at the next SOF (ischronous). The corresponding
F/HTXDx bit of F/HIFLG is set when active. This bit updated with TXACK
bit at the end of data transmission and is mutually exclusive with
TXACK.
Transmit Acknowledged Condition (read-only):
This bit is set when data is transmitted completely and acknowledged
successfully. The bit is updated by hardware at the end of data
transmission (non-isochronous) or at the next SOF (isochronous). The
corresponding F/HRXDx bit of F/HIFLG is set when active. This bit
updated with TXERR bit at the end of data transmission and is mutually
exclusive with TXERR.
1
TXERR
0
TXACK
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