
W83977TF
PRELIMINARY
Publication Release Date:March 1998
-94 -
Revision 0.62
Stop Frame Timing with Host using 17 IRQSER sampling period
T
S
R
T
S
S
R
R
T
NEXT CYCLE
STOP FRAME
IRQ14
FRAME
STOP1
IRQ15
None
None
Host Controller
H=Host Control
I=Idle
R=Recovery
T=Turn-around
S=Sample
PCICLK
IRQSER
Drive
1. Stop pulse is 2 clocks wide for Quiet mode, 3 clocks wide for Continuous mode.
2. There may be none, one or more Idle states during the Stop Frame.
IRQ15
FRAME
IOCHCK
FRAME
I2
H
R
T
START3
3. The next IRQSER cycle's Start Frame pulse may or may not start immediately after the turn-around clock of the Stip Frame.
10.1 Start Frame
There are two modes of operation for the IRQSER Start frame: Quiet mode and Continuous mode.
In the Quiet mode, the peripheral drives the SERIRQ signal active low for one clock, and then tri-
states it. This brings all the states machines of the peripherals from idle to active states. The host
controller will then take over driving IRQSER signal low in the next clock and will continue driving the
IRQSER low for programmable 3 to 7 clock periods. This makes the total number of clocks low for 4
to 8 clock periods. After these clocks, the host controller will drive the IRQSER high for one clock
and then tri-states it.
In the Continuous mode, only the host controller initiates the START frame to update IRQ/Data line
information. The host controller drives the IRQSER signal low for 4 to 8 clock periods. Upon a reset,
the IRQSER signal is defaulted to the Continuous mode for the host controller to initiate the first Start
frame.
10.2 IRQ/Data Frame
Once the start frame has been initiated, all the peripherals must start counting frames based on the
rsing edge of the start pulse. Each IRQ/Data Frame is three clocks: Sample phase, Recovery phase,
and Turn-around phase.
During the Sample phase, the peripheral drives SERIRQ low if the corresponding IRQ is active. If the
corresponding IRQ is inactive, then IRQSER must be left tri-stated. During the Recovery phase, the
peripheral device drives the IRQSER high. During the Turn-around phase, the peripheral device left
the IRQSER tri-stated.
The IRQ/Data Frame has a number of specific order, as shown in Table 10-1.
10.3 Stop Frame
After all IRQ/Data Frames have completed, the host controller will terminate IRQSER by a Stop
frame. Only the host controller can initiate the Stop frame by driving IRQSER low for 2 or 3 clocks. If
the Stop Frame is low for 2 clocks, the next IRQSER cycle's Sample mode is the Quiet mode. If the
Stop Frame is low for 3 clocks, the next IRQSER cycle's Sample mode is the Continuous mode.