
W83977TF
PRELIMINARY
Publication Release Date: March 1998
-113-
Revision 0.62
CRE
E
(GP26, Default 0x01)
Bit 7 - 3: Reserved.
Bit 2: Int En
= 1 Enable Common IRQ
= 0 Disable Common IRQ
Bit 1: Polarity: 1: Invert, 0: No Invert
Bit 0: In/Out: 1: Input, 0: Output
CRF0 (Default 0x00)
Debounce Filter Enable or Disable for General Purpose I/O Combined Interrupt. The Debounce Filter
can reject a pulse with 1ms width or less.
Bit 7 - 4: Reserved
Bit 3: GP Common IRQ Filter Select
= 1 Debounce Filter Enabled
= 0 Debounce Filter Bypassed
Bit 2 - 0: Reserved
CRF1 (Reserved)
CRF2 (Default 0x00)
Watch Dog
Timer Time-out value. Writing a non-zero value to this register causes the counter to load
the value to
Watch Dog
Counter and start to count down. If the Bit2 and Bit 1 are set, any Mouse
Interrupt or Keyboard Interrupt happen will also cause to reload the non-zero value to
Watch Dog
Counter and count down. Read this register can not access
Watch Dog
Timer Time-out value, but
can access the current value in
Watch Dog
Counter.
Bit 7 - 0:
= 0x00 Time-out Disable
= 0x01 Time-out occurs after 1 minute
= 0x02 Time-out occurs after 2 minutes
= 0x03 Time-out occurs after 3 minutes
................................................
= 0xFF Time-out occurs after 255 minutes
CRF3 (WDT_CTRL0, Default 0x00)
Watch Dog
Timer Control Register #0
Bit 7 - 4: Reserved
Bit 3: When Time-out occurs, Enable or Disable Power LED with 1 Hz and 50% duty cycle output.
= 1 Enable
= 0 Disable
Bit 2: Mouse interrupt reset Enable or Disable
= 1
Watch Dog
Timer is reset upon a Mouse interrupt
= 0
Watch Dog
Timer is not affected by Mouse interrupt
Bit 1: Keyboard interrupt reset Enable or Disable
= 1
Watch Dog
Timer is reset upon a Keyboard interrupt
= 0
Watch Dog
Timer is not affected by Keyboard interrupt
Bit 0: Reserved.