
W83977TF
Publication Release Date: March 1998
- II -
Revision 0.62
2.2.6 DATA RATE REGISTER (DR REGISTER) (WRITE BASE ADDRESS + 4).......................34
2.2.7 FIFO REGISTER (R/W BASE ADDRESS + 5)..........................................................................36
2.2.8 DIGITAL INPUT REGISTER (DI REGISTER) (READ BASE ADDRESS + 7)....................38
2.2.9 CONFIGURATION CONTROL REGISTER (CC REGISTER)
(WRITE BASE ADDRESS + 7)...................................................................................................39
3. UART PORT............................................................................................................................40
3.1
UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART A, UART B)..................40
3.2
REGISTER ADDRESS..............................................................................................................................40
3.2.1 UART CONTROL REGISTER (UCR) (READ/WRITE)...........................................................40
3.2.2 UART STATUS REGISTER (USR) (READ/WRITE)...............................................................42
3.2.3 HANDSHAKE CONTROL REGISTER (HCR) (READ/WRITE)............................................43
3.2.4 HANDSHAKE STATUS REGISTER (HSR) (READ/WRITE).................................................44
3.2.5 UART FIFO CONTROL REGISTER (UFR) (WRITE ONLY).................................................45
3.2.6 INTERRUPT STATUS REGISTER (ISR) (READ ONLY).......................................................46
3.2.7 INTERRUPT CONTROL REGISTER (ICR) (READ/WRITE).................................................47
3.2.8 PROGRAMMABLE BAUD GENERATOR (BLL/BHL) (READ/WRITE).............................47
3.2.9 USER-DEFINED REGISTER (UDR) (READ/WRITE).............................................................48
4. INFRARED (IR) PORT.........................................................................................................49
5. PARALLEL PORT ...............................................................................................................49
5.1
PRINTER INTERFACE LOGIC...............................................................................................................49
5.2
ENHANCED PARALLEL PORT (EPP)..................................................................................................50
5.2.1 DATA SWAPPER..........................................................................................................................51
5.2.2 PRINTER STATUS BUFFER.......................................................................................................51
5.2.3 PRINTER CONTROL LATCH AND PRINTER CONTROL SWAPPER...............................52
5.2.4 EPP ADDRESS PORT...................................................................................................................52
5.2.5 EPP DATA PORT 0-3....................................................................................................................53
5.2.6 BIT MAP OF PARALLEL PORT AND EPP REGISTERS.......................................................53
5.2.7 EPP PIN DESCRIPTIONS............................................................................................................54
5.2.8 EPP OPERATION..........................................................................................................................54
5.3
EXTENDED CAPABILITIES PARALLEL (ECP) PORT.....................................................................55
5.3.1 ECP REGISTER AND MODE DEFINITIONS...........................................................................55
5.3.2 DATA AND ECPAFIFO PORT....................................................................................................56
5.3.3 DEVICE STATUS REGISTER (DSR).........................................................................................56
5.3.4 DEVICE CONTROL REGISTER (DCR)....................................................................................57