
W83977TF
PRELIMINARY
Publication Release Date: March 1998
-121-
Revision 0.62
Bit 1: URAIDLEN.
= 0
disable the generation of an
SMI
interrupt due to UART A's idleness.
Bit 0: URBIDLEN.
= 1
enable the generation of an
SMI
interrupt due to UART A's idleness.
= 0
disable the generation of an
SMI
interrupt due to UART B's idleness.
CRF5 (Default 0x00)
Bit 7 - 4: Reserved. Return zero when read.
= 1
enable the generation of an
SMI
interrupt due to UART B's idleness.
Bit 3 - 0: Enable bits of the
SMI
generation due to device's trap.
These bits enable the generation of an
SMI
interrupt due to any I/O access, IRQ, and external
input to the device. These 4 bits control the printer port, FDC, UART A, and UART B SMI logics
respectively.
Bit 3: PRTTRAPEN.
= 0
disable the generation of an
SMI
interrupt due to printer port's trap.
Bit 2: FDCTRAPEN.
= 1
enable the generation of an
SMI
interrupt due to printer port's trap.
= 0
disable the generation of an
SMI
interrupt due to FDC's trap.
Bit 1: URATRAPEN.
= 1
enable the generation of an
SMI
interrupt due to FDC's trap.
= 0
disable the generation of an
SMI
interrupt due to UART A's trap.
Bit 0: URBTRAPEN.
= 1
enable the generation of an
SMI
interrupt due to UART A's trap.
= 0
disable the generation of an
SMI
interrupt due to UART B's trap.
CRF6 (Default 0x00)
Bit 7 - 6: Reserved. Return zero when read.
= 1
enable the generation of an
SMI
interrupt due to UART B's trap.
Bit 5 - 0: Enable bits of the
SMI
generation due to the device's IRQ.
These bits enable the generation of an
SMI
interrupt due to any IRQ of the devices. These 4 bits
control the printer port, FDC, UART A, and UART B
SMI
logics respectively. The
SMI
logic
output for the IRQs is as follows:
SMI
logic output = (URBIRQEN and URBIRQSTS) or (URAIRQEN and URAIRQSTS) or
(FDCIRQEN and FDCIRQSTS) or (PRTIRQEN and PRTIRQSTS)
(KBCIRQEN and KBCIRQSTS) or (MOUIRQEN and MOUIRQSTS)