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參數(shù)資料
| 型號(hào)： | W6690 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | ISDN S/T Interface Controller(ISDN S/T接口控制器) |
| 中文描述： | 綜合業(yè)務(wù)數(shù)字網(wǎng)的S / T接口控制器（綜合業(yè)務(wù)數(shù)字網(wǎng)S / T的接口控制器） |
| 文件頁(yè)數(shù)： | 41/76頁(yè) |
| 文件大小： | 471K |
| 代理商： | W6690 |
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Preliminary W6690
Publication Release Date: March 1998
- 41 -
Revision A1
RRST Receiver Reset
Setting this bit resets the D_ch HDLC receiver and clears the D_RFIFO data.
STT Start Timer
The D_ch hardware timer is started when this bit is set to one. The timer may be stopped by a write of
the D_TIMR register. Note that the timer must be in external mode.
XMS Transmit Message Start/Continue
Setting this bit will start or continue the transmission of a frame. The opening flag is automatically
added by the HDLC controller.
XME Transmit Message End
Setting this bit indicates the end of frame transmission.. The D_ch HDLC controller automatically
appends the CRC and the closing flag after the data transmission.
Note: If the frame
≤
32 bytes, XME plus XMS commands must be issued at the same time.
XRST Transmitter Reset
Setting this bit resets the D_ch HDLC transmitter and clears the D_XFIFO. The transmitter will send
inter frame time fill pattern (which is 1's) immediately. This command also results in a transmit FIFO
ready condition.
8.1.4 D_ch Mode Register
D_MODE
Read/Write
Address 03H
Value after reset: 00H
7
6
5
4
3
2
1
0
MMS
RACT
TMS
TEE
MFD
DLP
RLP
MMS Message Mode Setting
Determines the message transfer mode of the D_ch HDLC controller:
MMS
Mode
Address bytes
First byte address
comparison with:
Second byte address
comparison with:
0
Transparent
mode
2
D_SAP1, D_SAP2, SAPG
D_TEI1, D_TEI2, TEIG
Notes:
1. D_SAP1, D_SAP2: two programmable address values for the first received address byte; SAPG = fixed value
FC/FEH. D_TEI1, D_TEI2: two programmable address values for the second received address byte; TEIG = fixed value
FFH.
2. The first byte address comparison can be masked by D_SAM register, and the second byte address comparison can
be masked by D_TAM register. But the comparisons with SAPG and TEIG cannot be disabled.
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