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參數資料
| 型號： | W6690 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | ISDN S/T Interface Controller(ISDN S/T接口控制器) |
| 中文描述： | 綜合業(yè)務數字網的S / T接口控制器（綜合業(yè)務數字網S / T的接口控制器） |
| 文件頁數： | 57/76頁 |
| 文件大小： | 471K |
| 代理商： | W6690 |
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Preliminary W6690
Publication Release Date: March 1998
- 57 -
Revision A1
8.2.12 B1_ch Receive Frame Byte Count LowB1_RBCL
Read
Address 2BH
Value after reset: 00H
7
6
5
4
3
2
1
0
RBC7
RBC6
RBC5
RBC4
RBC3
RBC2
RBC1
RBC0
RBC7
0 Receive Byte Count
Used in transparent mode only. Eight least significant bits of the total number of bytes in a received
frame. These bits are valid only after a RME interrupt and remain valid until the frame is
acknowledge via the RACK bit.
8.2.13 B1_ch Receive Frame Byte Count High
B1_RBCH
Read
Address 2CH
Value after reset: 00H
7
6
5
4
3
2
1
0
LOV
RBC12
RBC11
RBC10
RBC9
RBC8
LOV Message Length Overflow
Used in transparent mode only. A "1" in this bit indicates a received message
≥
4097 bytes. This bit is
valid only after RME interrupt and is cleared by the RACK command.
RBC12
8 Receive Byte Count
Used in transparent mode only. Five most significant bits of the total number of bytes in a received
frame. These bits are valid only after a RME interrupt and remain valid until the frame is
acknowledge via the RACK bit.
Note: The frame length equals RBC12-0. This length is between 1 to 4096. After a RME interrupt, the
number of data available in B1_RFIFO is frame length modulus threshold.
remainder = RBC12-0 MOD threshold
no. of available data = remainder
no. of available data = threshold
The remainder equals RBC4
0 if threshold is 32.
if remainder
≠
0 or
if remainder = 0
8.3. B2 HDLC controller
Table 8.7 Register address map: B2 channel HDLC
OFFSET
30
31
32
33
34
ACCESS
R
W
W
R/W
R_clear
REGISTER NAME
B2_RFIFO
B2_XFIFO
B2_CMDR
B2_MODE
B2_EXIR
DESCRIPTION
B2 channel receive FIFO
B2 channel transmit FIFO
B2 channel command register
B2 channel mode control
B2 channel extended interrupt
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