- 您現在的位置：買賣IC網 > PDF目錄363904 > W89C940 (WINBOND ELECTRONICS CORP) ELANC-PCI (TWISTED-PAIR ETHER-LAN CONTROLLER WITH PCI INTERFACE) PDF資料下載
參數資料
| 型號： | W89C940 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | ELANC-PCI (TWISTED-PAIR ETHER-LAN CONTROLLER WITH PCI INTERFACE) |
| 中文描述： | ELANC -的PCI（雙絞線醚局域網控制器帶有PCI接口） |
| 文件頁數： | 26/61頁 |
| 文件大小： | 353K |
| 代理商： | W89C940 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁
W89C940
26
CLK
1
2
3
4
5
6
7
8
AD[31::0]
ADDRESS
BUS CMD
DATA
BE#'s
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
C_BE[3:0]#
FRAME#
The transaction is initiated by FRAME# , the address is asserted and bus read command of C/BE[3:0]# is also
asserted. This phase is called address phase. IRDY# (Initiator Ready) is asserted by master after address
phase. Target initiate TRDY#( Target Ready) and assert valid data on the bus. The DEVSEL# means the target
is addressed and respond to the master device. The data transaction is happened on both IRDY# and TRDY#
are asserted on the same clock edge that is called data phase. During the data phase, the BE (Byte Enable)
indicate the data length of the data. If it is a double word, 32 bits, the BE will be 0000. If data is a word, the BE
will be 1100 or 0011
If the host send the memory read command in burst mode, W89C940 accept the first data phase
access and then reject the further data access request with retry disconnection. Only one data phase
is allowed for transaction.
Write Transaction ( I/O and Memory Write)
The write transaction is like read transaction, the FRAME# initiate the transaction with address phase and the
data is written in data phase. The data could be asserted directly after address phase. It does not need a WAIT
state for avoiding bus contention. The transaction is ended when the FRAME#, IRDY#, TRDY# and DEVSEL#
are deasserted. If the host send the memory read command in burst mode, W89C940 accept the first data
phase access and then reject the further data access request with Retry disconnection. Only one data phase is
allowed for transaction.
The write transaction is as shown in the figure
相關PDF資料 |
PDF描述 |
|---|---|
| W89C982 | INTEGRATED MULTIPLE REPEATER II |
| W89C982AF | INTEGRATED MULTIPLE REPEATER II |
| W8NB80 | N - CHANNEL 800V - 1.2ohm - 7.5A - TO-247 PowerMESH MOSFET |
| W90100F | Embedded Micro-Controller(32位嵌入式的微控制器) |
| W90210F | PA-RISC Embedded Micro-Controller(惠普PA-RISC結構的32位嵌入式微控制器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W89C940F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10M PCI-Bus Ethernet Network Interface Controller |
| W89C982 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:INTEGRATED MULTIPLE REPEATER II |
| W89C982AF | 制造商:WINBOND 制造商全稱:Winbond 功能描述:INTEGRATED MULTIPLE REPEATER II |
| W8C2-DNL | 制造商:Hwei Lung Precision Machinery 功能描述:TORCH 8 LED BLACK 2C |
| W8D10PF29033 | 制造商:TE Connectivity 功能描述: |
發布緊急采購，3分鐘左右您將得到回復。