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參數資料
型號: W89C940
廠商: WINBOND ELECTRONICS CORP
英文描述: ELANC-PCI (TWISTED-PAIR ETHER-LAN CONTROLLER WITH PCI INTERFACE)
中文描述: ELANC -的PCI(雙絞線醚局域網控制器帶有PCI接口)
文件頁數: 31/61頁
文件大小: 353K
代理商: W89C940
W89C940
31
Fast Back-to-Back Transactions
CLK
FRAME#
AD[31::0]
IRDY#
TRDY#
DEVSEL#
STOP#
ADDRESS
BUS CMD
DATA
BE#'s
1
2
3
4
5
6
7
PAR
C/BE[3::0]#
8
ADDRESS
BUS CMD
BE#'s
DATA
Without contention of TRDY#, DEVSEL#, or STOP#, the IDLE states between transactions are removed. It
increase the throughput of the data transaction. If the first transaction is a write cycle and the second transaction
access( can be read or write transaction) to the same target , one IDLE cycle can be removed between
transactions.
Parity
As shown in the figure below, parity is generated at immediately following clock and the internal PERR# is after
PAR. Parity is calculated the same on all PCI transactions regardless of the type or form. Parity covers
AD[31:0] and C/BEB[3:0]# lines regardless of whether or not all lines carry meaningful information. The number
of 1s on AD[31:0], C/BEB[3:0]# and PAR equals an even number. Parity is also calculated at Configuration
phase.
1
2
3
4
CLK
FRAME#
AD[31::0]
ADDRESS
BUS CMD
DATA
BE#'s
5
PAR
PERR#
C_BE#[3::0]
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