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參數資料
| 型號： | W89C940 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | ELANC-PCI (TWISTED-PAIR ETHER-LAN CONTROLLER WITH PCI INTERFACE) |
| 中文描述： | ELANC -的PCI（雙絞線醚局域網控制器帶有PCI接口） |
| 文件頁數： | 7/61頁 |
| 文件大小： | 353K |
| 代理商： | W89C940 |
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W89C940
7
MEMORY INTERFACE
NAME
NUMBER
TYPE
DESCRIPTION
MSRDB
49
O/MOS
Local Memory Read Enable.
An active low signal to enable the local SRAM read.
MSWRB
50
O/MOS
Local Memory Write Enable.
An active low signal to enable the local SRAM write.
MSA[14:0]
69 - 55
O/MOS
Local
Memory
Address
Bus.
Address bus for local memory addressing.
The MSA14 will be used as the address strobe signal when the size is larger than
32Kx8. If the ROM size is larger than 32Kx8, Boot ROM address !13-A10 is
connected to MSA13-MSA10 and A17-A14 is connected to the latched MSA13-
MSA10. The valid address for the higher significant bits(A14,A15,....) will be stable
before the BPCSB is active low and should be latched by an external data latch
which is triggered by MSA14. The A0 ~ A13 of the BOOT ROM device are
connected to MSA0 ~ MSA13 directly no matter the BOOT ROM size is larger
than 32Kx8 or not.
RCSB
70
O/MOS
Memory Chip Select:
The RCSB is active low.
RCSB enables the local memory read/write cycle in conjunction with the MSRDB,
MSWRB pins.
BPCSB
71
O/MOS
BOOT ROM Chip Select:
BPCSB is active low.
BPCSB enables the BOOT ROM read cycle during the system booting up.
EECS
72
O/MOS
EEPROM Chip Select.
The EEPROM read/write operation will be enabled when EECS is active high.
POWER PINS
NAME
NUMBER
TYPE
DESCRIPTION
DVCC
1, 16, 30,
31, 54
I
Digital Power Supply:
5V DC power supply for internal digital logic circuitry.
DGND
15, 28, 32,
51, 86, 100
I
Digital Ground:
Ground pins for internal digital logic circuitry.
AVCC
81
I
Analog Power Supply:
5V DC power supply for internal analog circuitry.
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