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參數(shù)資料
| 型號： | W89C940 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | ELANC-PCI (TWISTED-PAIR ETHER-LAN CONTROLLER WITH PCI INTERFACE) |
| 中文描述： | ELANC -的PCI（雙絞線醚局域網(wǎng)控制器帶有PCI接口） |
| 文件頁數(shù)： | 6/61頁 |
| 文件大小： | 353K |
| 代理商： | W89C940 |
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W89C940
6
NETWORK INTERFACE
NAME
NUMBER
TYPE
DESCRIPTION
RXP
RXN
79
78
I/AUI
AUI Receive Input:
AUI differential input pair. The data received by network transceiver will be sent
back through RXP and RXN in a differential signal format. The RXP and RXN
are also should be isolated by a pulse transformer.
CDP
CDN
77
76
I/AUI
AUI Collision Input:
AUI differential input pair. The network transceiver will drive a 10MHz
differential signal onto CDP and CDN when a collision event is occurred. The
CDP and CDN should be isolated by a pulse transformer.
XRDP
XRDM
84
85
I/TPI
TPI Receive Input:
10BASE-T receive differential input pair. RXP and RXN should be shunted by
a 100 ohms resistor for twisted-pair line impedance matching.
TPDP
TPDM
82
83
O/TPI
TPI Transmit Output:
10BASE-T transmit differential output pair. A 1.21K ohm shunt resistor is
required across the TXP and TXN for signal pre-equalization.
ACT
73
O/LED
Activity Displaying:
Network activity displaying. ACT will indicate the network activity status by three
types of signals(DC 0 , DC1 and AC 10Hz).
DC 0 : indicating "Link Good", if UTP is selected.
DC 1 : indicating 1) "Link fail", if UTP is selected.
2) "idle", if AUI is selected.
AC 10HZ : indicating the DTE is transmitting a packet or the carrier on the
network is detected by the transceiver and the carrier sense signal is received
by W89C940.
The ACT will keep DC 1 if there is an abnormal network collision occurred, f.g.
the transceiver collision signal always active.
MEMORY INTERFACE
NAME
NUMBER
TYPE
DESCRIPTION
MSD[7:0]
48 - 41
B/MOS
Local Memory Data Bus:
A bidirection bus for data transfer between the local memory and the W89C940.
MSD0 is used as a serial data input pin during the auto configuration duration for
hardware reset. The data drove by the DO of EEPROM will clocked into the
MSD0 when the EEPROM load operation is active. The Ethernet node ID and
optional configuration content will be loaded into chip
s
registers at this moment.
MSD1 is used as a serial data output pin during the auto configuration duration for
hardware reset.The command drove by the MSD1 will be clocked into the DI of
EEPROM
for
accessing
the
MSD2 supplies the clock with a period of 1.2
μ
S for EEPROM during auto
configuration duration.
content
of
EEPROM.
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