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參數(shù)資料
| 型號： | W90210F |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PA-RISC Embedded Micro-Controller(惠普PA-RISC結構的32位嵌入式微控制器) |
| 中文描述： | 32-BIT, MROM, RISC MICROCONTROLLER, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數(shù)： | 38/67頁 |
| 文件大?。?/td> | 297K |
| 代理商： | W90210F |
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W90210F
38
Version 1.4, 10/8/97
The above information is the exclusive intellectual property of Winbond Electronics Corp. and shall not be disclosed, distributed or reproduced without permssion fromWinbond.
This bit shall be set to 1 whenever there are readIntrThreshold or more valid Pwords to be read
from FIFO.
Bit[6]- Full (Read only)
1: direction = 0 The FIFO cannot accept another Pword.
1: direction = 1 The FIFO is completely full.
0: direction = 0 The FIFO has at least 1 free Pword
0: direction = 1 The FIFO as at least 1 free byte.
Bit[7]- empty (Read only)
1: direction = 0 The FIFO is completely empty
1: direction = 1 The FIFO contains less than 1 Pword of data
0: direction = 0 The FIFO contains at least 1 byte of data
0: direction = 0 The FIFO contains at least 1 Pword of data
5. CONFIGA register (offset 244) (R/W only in configuration mode)
0
7
Bit [0]- Indicates if interrupts are pulsed or level (Read only)
0: pulse
1: level
Bit [1:3 ]- Pword size (R/W)
001: Pword size = 1 byte
010: Pword size = 4 byte
000 and 011 ~ 111: reserved
Bit [4]- reserved
Bit [5]- nByteInTransceiver (Read only)
0: When transmiting (at host recovery), there is one byte in the transceiver waiting to be transmitted
that does not affect the FIFO full bit.
Bit [6:7]- Snapshot of the Pword
This field is not used for Pword size of 1 byte.
For host recovery situations these bits indicate what fraction of a Pword was not transmitted so that
software can re-transmit the unsent bytes. If the Pword size is 4 bytes the value of these two bits is a
snapshot of the last Pword being transmitted in mode 011 event 35 when the FIFO was reset (port
was transitioned from mode 011 to mode 000 or 001)
00- the Pword at the head of the FIFO contained a complete Pword
01- the Pword at the head of the FIFO contained only 1 valid bytes.
10- the Pword at the head of the FIFO containeed 2 valid bytes.
11- the Pword at the head of the FIFO contained 3 valid bytes.
6. Reverse address register (offset 245) (Read only)
0
7
Bit [0:1]- Reserved
Bit [2]- Tag_all
1: To indicate the unread bytes of the FIFO storing the reverse data/ command that has at least
one address bytes.
0: There is no address byte in the FIFO
Bit [3:6]- Tag0, Tag1, Tag2, Tag3
to check if there is one byte of the following read Pword = 4 bytes is the reverse address. Tag0,
Tag1, Tag2 and Tag3 are individually for the byte0, byte1, byte2 and byte3 of the Pword
Bit [7]- Tag
to check if the byte of the following read Pword (1 byte) is the reverse address.
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