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參數(shù)資料
型號: W90210F
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: PA-RISC Embedded Micro-Controller(惠普PA-RISC結(jié)構(gòu)的32位嵌入式微控制器)
中文描述: 32-BIT, MROM, RISC MICROCONTROLLER, PQFP208
封裝: PLASTIC, QFP-208
文件頁數(shù): 48/67頁
文件大?。?/td> 297K
代理商: W90210F
W90210F
48
Version 1.4, 10/8/97
The above information is the exclusive intellectual property of Winbond Electronics Corp. and shall not be disclosed, distributed or reproduced without permssion fromWinbond.
Appendix A. PA-RISC Multimedia Instruction Set
Halfword parallel add
Format:
HADD
HADD, cmplt
r1,r2,t
0
3
4
sat
2 1
02
6
5
5
3
5
r2
r1
t
0:5
5:10
11:15
27:31
26
0
1
0
Purpose:
To add multiple pairs of halfwords in parallel with optional saturation.
Description:
The corresponding halfwords of GR r1 and GR r2 are added together in parallel. Optional
saturation is performed, which forces each halfword result to either the maximum or the
minimum value, if the result would have been out of the range of the target format. The
halfword results are placed in GR t.
The completer, cmplt, determines whether modular, signed-saturation, or unsigned-
saturation arithmetic is performed. When no completer is specified (sat=3) modular
arithmetic is performed. The completer "ss" (sat=1) designates signed saturation. The
completer "us" (sat=0) indicates unsigned saturation. For signed saturation, all operands are
treated as signed numbers, and the results are signed numbers. For unsigned saturation, the
first operands, from GR r1, are treated as unsigned numbers, the second operands, from GR
r2, are treated as signed numbers, and the results are unsigned numbers.
Operation:
GR[t]{0..15}
GR[r1]{0..15} + GR[r2]{0..15};
GR[t]{16..31}
GR[r1]{16..31} + GR[r2]{16..31};
switch (cmplt) {
case ss:
if (max_signed_sat_L)
GR[t]{0..15}
0x7FFF;
else if (min_signed_sat_L)
GR[t]{0..15}
0x8000;
if (max_signed_sat_R)
GR[t]{16..31}
0x7FFF;
else if (min_signed_sat_R)
GR[t]{16..31}
0x8000;
break;
if (max_unsigned_sat_L)
GR[t]{0..15}
0xFFFF;
else if (min_unsigned_sat_L)
GR[t]{0..15}
0x0000;
if (max_unsigned_sat_R)
GR[t]{16..31}
0xFFFF;
else if (min_unsigned_sat_R)
GR[t]{16..31}
0x0000;
break;
/* sat=1 */
case ss:
/* sat=0 */
default:
/* sat=3 */
break;
}
Exceptions:
None.
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