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參數(shù)資料
| 型號(hào)： | W90210F |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PA-RISC Embedded Micro-Controller(惠普PA-RISC結(jié)構(gòu)的32位嵌入式微控制器) |
| 中文描述： | 32-BIT, MROM, RISC MICROCONTROLLER, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數(shù)： | 51/67頁 |
| 文件大小： | 297K |
| 代理商： | W90210F |
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W90210F
51
Version 1.4, 10/8/97
The above information is the exclusive intellectual property of Winbond Electronics Corp. and shall not be disclosed, distributed or reproduced without permssion fromWinbond.
Halfword parallel shift left and add
Format:
HSHLADD
HSHLADD
r1,k,r2,t or
HSL1ADD
r1,r2,t
HSL2ADD
HSL3ADD
r1,r2,t
r1,r2,t
0
7
4
02
6
5
5
3
2 1
5
r2
r1
t
0:5
5:10
11:15
27:31
26
0
1
0
k
Purpose:
saturation.
To perform multiple pairs of halfword shift left and add operations in parallel with
Description:
Each halfword of GR r1 is shifted left by k bits, and then added to the corresponding
halfword of GR r2. Signed saturation is performed on the addition, which forces each
halfword result to either the maximum or the minimum value, if the result would have been
out of range. The halfword results are placed in GR t. The shift amount is either 1, 2, or 3,
and is encoded in the k field of the instruction.
All operands are treated as signed numbers, and the results are signed numbers. Signed
saturation is performed.
For this instruction, signed saturation is based both on the shift operation and the add
operation. That is, if the result of the shift operation is not representable in 16 bits, signed
saturation occurs. If GR r1 was positive, maximum saturation occurs. If GR r1 was negative,
minimum saturation occurs. If the result of the shift operation is representable in 16 bits,
then saturation is determined by the add operation in the normal fashion.
Operation:
GR[t]{0..15}
←
lshift(GR[r1]{0..15},k) + GR[r2]{0..15};
GR[t]{16..31}
←
lshift(GR[r1]{16..31},k) + GR[r2]{16..31};
if (max_signed_sat_L)
GR[t]{0..15}
←
0x7FFF;
else if (min_signed_sat_L)
GR[t]{0..15}
←
0x8000;
if (max_signed_sat_R)
GR[t]{16..31}
←
0x7FFF;
else if (min_signed_sat_R)
GR[t]{16..31}
←
0x8000;
Exceptions:
None.
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