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參數資料
| 型號： | W90220F |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PA-RISC Embedded Micro-Controller(惠普PA-RISC結構的32位嵌入式微控制器) |
| 中文描述： | 32-BIT, 150 MHz, RISC PROCESSOR, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數： | 4/79頁 |
| 文件大小： | 501K |
| 代理商： | W90220F |
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W90220F
4
The above information is the exclusive intellectual property of Winbond Electroncs Corp. and shall not be dsiclosed or distributed or reproduced without permission from
Version 0.84
Winbond.
1. OVERVIEW
The W90220 is a high performance, highly integrated 32-bit processor intended for a wide range of
embedded applications, such as videophone, internet devices, internetworking platform. Fig 1-1 shows a
block diagram of the overall system. The W90220 consists of a 32-bit PA-RISC core, memory controller
and integrated logics for I/O modules
The PA-RISC core is equipped with 4 KBytes of instruction cache memory and 4 KBytes of data cache
memory augmented with a dual-cycle multiply/accumulate module running up to 150 MHz. It allows to
implement integrated DSP functions like software modem for high-performance standard data and fax
protocols. A flexible power management scheme (under software control) and lots of low power circuits
have been used to eliminate the chip's power consumption. The W90220 consume only 375 mA at its
maximum speed (150 MHz) on a full-load system.
The chip provides two 8-bit DMA channels, four 16-bit IDE I/O channels, a PCI bridge supporting up to
four external PCI masters, a IEEE-1284 compliant parallel port interface (PPI), two RS232 type universal
asynchronous serial port (UART), two timer channels, a flexible synchronous interface (SSI) connecting to
an external audio or telephony codec devices, a proprietary serial ICE interface (SP-ICE) for software
development and debugging.
The chip has a high performance memory controller. The types of external memory devices supported
include dynamic random access memory (DRAM), Extended data out dynamic random access memory
(EDO-DRAM), static random access memory (SRAM), Flash memory as well as read-only memory
(ROM).
PCI
Bridge
Memory
Controller
DMA
Controller
Parallel Port
Interface
UART
(x2)
Sync. Serial
Port
Timer (x2)
32-bit Internal DMA bus
32-bit CPU Internal Bus
6-Stage Integer Pipeline
Instr. Cache
RAM
Internal Bus Interface Unit
PLL
Data Cache
RAM
Branch Table
RAM
OSC
(14.318 Mhz)
CPUCLK
PCI Bus
DRAM/Flash/
ROM Port
8-bit-DMA/
16-bit-IO Bus
Power Mang.
Unit
Serial ICE
Unit
Serial ICE
Bus
3
Fig 1-1 : W90220 Internal Block Diagram
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| W90221F | PA-RISC Embedded Micro-Controller(惠普PA-RISC結構的32位嵌入式微控制器) |
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