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參數資料
| 型號： | W9310 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | Direct Sequence Spread Spectrum Transceiver(直接序列擴展頻譜收發器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數： | 11/36頁 |
| 文件大小： | 220K |
| 代理商： | W9310 |
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W9310
Publication Release Date: July 1996
- 11 -
Revision A3
FIFOs
The W9310 includes a 30-byte transmit FIFO and a 30-byte receive FIFO to buffer the input and
output data. The FIFO control is generated by the TDD controller. Note that during half-duplex data
operation, the data are in flow-through mode and thus are not buffered by the FIFOs.
Master Clock Generator
The master clock generator generates the various clock signals required by the modules described
above. It can be disabled to reduce power consumption.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
V
DD
V
SS
V
IL
V
IH
V
OL
V
OH
I
T
OPR
T
STG
RATING
-0.3 to +6.5
V
SS
-0.5
V
DD
+0.5
V
SS
-0.5
V
DD
+0.5
±
10
0 to +70
-55 to 150
UNIT
V
V
V
V
V
mA
DC Supply Voltage
Input/Output Voltage
DC Current, Any Pin (except V
DD
and V
SS
)
Operating Temperature
Storage Temperature
°
C
°
C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
ELECTRICAL CHARACTERISTICS
I/O Characteristics
(V
DD
= 5 V. T
A
= 25
°
C)
PARAMETER
SYM.
CONDITIONS
MIN.
TYP.
MAX.
UNIT
"H" Input Current 1
(Note 1)
I
IH1
V
IH
= 0.7 V
DD
V
DD
V
SS
= V
SS
0.3 V
DD
-
-275
-
-45
μ
A
μ
A
K
μ
A
μ
A
μ
A
μ
A
K
"L" Input Current 1
(Note 1)
I
IL1
-
-
40
Pull-down Resistance
R
PD
-
11
-
"H" Input Current 2
(Note 2)
I
IH2
V
IH
= 0.7 V
DD
V
SS
V
IL
= V
SS
0.3 V
DD
V
IH
= 0.7 V
DD
V
DD
V
IL
= V
SS
0.3 V
DD
-
-10
-
-
"L" Input Current 2
(Note 2)
I
IL2
-
-
10
"H" Input Current 3
(Note 3)
I
IH3
-40
-
-
"L" Input Current 3
(Note 3)
I
IL3
45
-
290
Pull-up Resistance
R
PU
-
18
-
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