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參數資料
| 型號： | W9310 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | Direct Sequence Spread Spectrum Transceiver(直接序列擴展頻譜收發器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數： | 20/36頁 |
| 文件大小： | 220K |
| 代理商： | W9310 |
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W9310
- 20 -
Programming the Serial Bus Interface
The serial bus is designed to interface with generic microprocessors such as the Winbond W921F880
or an equivalent product. It supports loading of the W9310 from the microprocessor and generates
two interrupts for remote signaling and delivering S/N data. These operations are discussed in more
detail below.
Serial Loading of W9310 Programmable Data
The microprocessor configures the W9310 by serially loading the W9310 with programmable
information, including PN sequences, unique word, configuration information bits, and status nibble.
The W9310 is loaded by means of the following steps:
1. The microprocessor sets the appropriate address for the intended register using the 4-bit ADDR
line.
2. The microprocessor selects the W9310 by setting CHIPSEL_N to low.
3. The microprocessor puts the data on the SDI pin and toggles the SCLK clock the required number
of clock cycles (note: 3 for Address 12 configuration bits loading, 8 for Address 13 status nibble
loading and 5 for Address 14 testing bits loading. The remainding, from 2 to address 11, are 16 for
SDI clocking into W9310). Note that the SDI data are clocked into the W9310 on the rising edge of
the SCLK clock pulse and that loading is done MSB first (except for the configuration information
bits; see Table 1.).
4. The microprocessor latches the serial data into the appropriate register by clocking the LATCH
clock once.
5. The microprocessor sets the address to an unused address (for example, hex 15), and releases
CHIPSEL_N.
Note: When the microprocessor programs the address 2 to 12 and 14 for W9310, It must first assert (HIGH) the RST1_N and
de_assert (LOW) RST2_N of W9310 and then performs the procedures as above. But for address 13, both RST1_N and
RST2_N are set HIGH first.
An example of the serial loading timing is shown in Figure 8.
SCLK
ADDR
15H
2H
15H
MSB
LSB
SDI
LATCH
CHIPSEL_N
Figure 8. Timing for Serial Bus Loading
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| W9310-16C64RC | 制造商:Winslow Adaptics Ltd 功能描述:40 way DIL to 44 way PLCC socket,16C64 |
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| W9310RC | 制造商:Winslow Adaptics Ltd 功能描述:40way DIL to 44way PLCC socket,2.1x1.2in |
| W9312 | 制造商:Apex Tool Group 功能描述:3/4 IN. X 12 FT MEZURALL POWER RETURN TAPE |
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