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參數資料
| 型號： | W9310 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | Direct Sequence Spread Spectrum Transceiver(直接序列擴展頻譜收發器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數： | 23/36頁 |
| 文件大小： | 220K |
| 代理商： | W9310 |
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W9310
Publication Release Date: July 1996
- 23 -
Revision A3
Configuration Information Bits
The configuration information bits are used to set various programmable parameters in the W9310:
CI0
Set W9310 to normal (low) or test (high) mode. Should be set to low during normal operation.
CI1
Test TDD (ping-pong) circuits when set to high. Set to low during normal operation.
CI2, 3
PLSL. Sets the width of the ESD window. CI2 is LSB, CI3 is MSB.
PLSL
0
1
2
3
WIDTH OF ESD WINDOW
8 samples wide
10 samples wide
12 samples wide
14 samples wide
CI4
CNTLR. Sets the width of the "Central Region." (Note: CNTLR size must be
≤
PLSL size).
CNTLR
0
1
WIDTH OF CENTRAL REGION
10 samples wide
12 samples wide
CI5
ACC1RES. DPLL Accumulator 1 reset.
ACC1RES
ACCUMULATOR 1 RESET
0
ACC1 NOT reset.
1
Reset ACC1.
CI6, 7
WSL. Sets the width of the "Detection Window." CI6 is LSB, CI7 is MSB.
WSL
WIDTH OF DETECTION WINDOW
0
4 samples wide
1
6 samples wide
2
8 samples wide
3
10 samples wide
CI8
M/SB. Set the W9310 to be a master (high) or slave (low).
Note: CI8 must be set to low in half-duplex data mode.
CI9. 0, 11 T. Number of errors allowed in the UW. CI9 is LSB, CI11 is MSB.
T
ALLOWABLE UW ERRORS
0
0 bit
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相關代理商/技術參數 |
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| W9310-16C64RC | 制造商:Winslow Adaptics Ltd 功能描述:40 way DIL to 44 way PLCC socket,16C64 |
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