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參數資料
| 型號： | W9310 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | Direct Sequence Spread Spectrum Transceiver(直接序列擴展頻譜收發器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數： | 9/36頁 |
| 文件大小： | 220K |
| 代理商： | W9310 |
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W9310
Publication Release Date: July 1996
- 9 -
Revision A3
Pin Description, continued
SYMBOL
TC_UP
PIN
80
I/O
I
FUNCTION
Test counter up/down control. When high, the test counter counts
up; when low, the test counter counts down.
Test 1 control. Places the W9310 in test mode when high. Must be
set to low during normal operation.
Test only. Must be set to LO during normal operation
Test only
Test only. Must be set to LO during normal operation
Test only.
Test only. Must be set to LO during normal operation
Test only.
Test only. Must be set to LO during normal operation
TEST1
49
I
AIN
SOUT
SIN
AOUT
ST8IN
ST8OUT
ARST
26
66
27
69
28
74
29
I*
O
I*
O
I*
O
I*
Note: An asterisk ("*") denotes pins that are bidirectional. These pins are configured as inputs in normal operation (TEST1 = 0)
and as outputs during testing (TEST1 = 1).
BLOCK DIAGRAM
CHIPSEL_N
SCLK
SDI
ADDR[3:0]
LATCH
IRQ1_N
IRQ2_N
SDO
DI
RCVCLK
RCVDATA
RCVCLK
MICROCONTROLLER
INTERFACE
RECEIVER
TX
RX
FCLK_RT
MHZ2_ST
OSCO
OSCEN
OSCI
XTRCLK
X8KHZ
SDP
TC_UP
TEST1
EPX[6:0] / EPY[6:0]
RTS_N
DTR_N
DAT
RXDELAY
RST1_N
RST2_N
UWDET_N
LOCKED
RLOCK
OSCF
PLLSW
TXEN
RFPWR
OSCUP
BSYNC_IN
BSYNC_OUT
TX_DATA
TDD CONTROL
MODOUT
TRANSMITTER
TX
FIFO
RX
FIFO
TDMUX
TD
PN A
B C D
UW
M
/
S
Tstatus
Rstatus
PNA
PNB
PNC
PND
RCVDATA
freeze PLL
TX Data
TX Enable
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相關代理商/技術參數 |
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| W9310RC | 制造商:Winslow Adaptics Ltd 功能描述:40way DIL to 44way PLCC socket,2.1x1.2in |
| W9312 | 制造商:Apex Tool Group 功能描述:3/4 IN. X 12 FT MEZURALL POWER RETURN TAPE |
| W9312D | 制造商:Apex Tool Group 功能描述:3/4 IN. X 12 FT MEZURALL POWER RETURN TAPE, 10THS AND 100THS |
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