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參數資料
| 型號： | W9310 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | Direct Sequence Spread Spectrum Transceiver(直接序列擴展頻譜收發器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數： | 6/36頁 |
| 文件大小： | 220K |
| 代理商： | W9310 |
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W9310
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Pin Description, continued
SYMBOL
DCD_N
PIN
77
I/O
O
FUNCTION
Data carrier detected. Used by the W9310 to signal DTE that it has
received valid data. In the full-duplex mode, DCD_N is asserted
when the W9310 has achieved LOCK and stored received data in
the RCVFIFO. It is negated when the link goes down or when
RCVFIFO is empty. When DCD_N is negated, RX remains high.
In half-duplex mode, DCD_N is asserted when the W9310 has
locked onto the remote W9310 and is negated when the signal
disappears. The time interval between W9310 achieving lock and
DCD_N assertion and that between W9310 releasing lock and
DCD_N negation are user-programmable through the
microprocessor interface.
In either mode, valid received data are available on the RX pin on
the same falling edge of the FCLK_RT clock as DCD_N assertion.
Data terminal relay. The W9310 will neither transmit nor receive
data when DTR_N is negated.
Data set ready. In the full-duplex mode, the W9310 asserts this
signal when LOCKED condition has been achieved. The W9310
negates DSR_N when the communication link is lost.
In the half-duplex mode, DSR_N is asserted as soon as the W9310
is powered and enabled.
DTR_N
31
I*
DSR_N
79
O
Data I/O
TX
19
I
Transmit data. Data on the TX are transmitted by the W9310 when
the DTR_N, DSR_N, RTS_N, and CTS_N signals are asserted;
otherwise, TX remains high. Valid data should be available on the
TX line before the rising edge of the MHZ2_ST transmit clock after
CTS_N has been asserted.
In voice mode, the TX pin accepts ADPCM sample input.
Receive data. Outputs data from the W9310 to the DTE when
DTR_N, DSR_N, and DCD_N signals asserted; otherwise, RX
remains high. Depending on RXDELAY setting, valid data may be
available on the RX pin on the same falling edge of the FCLK_RT
clock as DCD_N assertion.
In voice mode, the W9310 delivers received ADPCM samples on
this pin.
RX
20
O
Clock Signals
MHZ2_ST
24
O
Transmit clock/Bit clock. In synchronous mode, MHZ2_ST is used
to synchronously clock in the transmit data on the TX on the rising
edge of the clock. Also known as ST or TXC.
In voice mode, the MHZ2_ST pin delivers the 2.048 MHz bit rate
clock signal to the ADPCM codec.
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