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參數(shù)資料
| 型號(hào)： | W6692 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 MM, 2.75 MM HEIGHT, QFP-100 |
| 文件頁(yè)數(shù)： | 25/84頁(yè) |
| 文件大小： | 473K |
| 代理商： | W6692 |
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W6692
Publication Release Date: October 1998
- 25 -
Revision A1
The W6692 achieves synchronization after 5 frames, i.e m = 4.
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Info X
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Device
Settings
Result
W6692
m = 4
Pass
7.2.6 Multiframe Synchronization
As specified by ITU-T I.430, the Q bit is transmitted from TE to NT in the position normally occupied
by the auxiliary framing bit (FA) in one frame out of 5, whereas the S bit is transmitted from NT to TE.
The S and Q bit positions and multiframe structure are shown in Table 7.6.
The functions provided by W6692 are:
-
Multiframe synchronization: Synchronization is achived when the M bit pattern has been
correctly received during 20 consecutive frames starting from frame number 1.
Note: Criterion for multiframe synchronization is not defined in I.430 Recommendation.
-
S bits receive and detect: When synchronization is achieved, the four received S bits in
frames 1, 6, 11, 16 are stored as S1 to S4 in the SQR register respectively. A change in the
recived four bits (S1-4) is indicated by an interrupt (ISC in D_EXIR register and SCC in CIR
register).
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Multiframe synchronization monitoring: Multiframe synchronization is constantly monitored.
The synchronization state is indicated by the MSYN bit in the SQR register.
-
Q bits transmit and F
A
mirroring: When multiframe synchronization is achived, the four bits
Q1-4 stored in the SQXR register are transmitted as the four Q bits (F
A
-bit position) in frames
1, 6, 11 and 16. Otherwise the F
A
bit transmitted is a mirror of the received F
A
-bit. At loss of
synchronization, the mirroring is resumed at the next F
A
-bit.
-
The multiframe synchronization can be disabled by setting MFD bit in the D_MODE register.
-
According to I.430 Recommendation, the S/Q channel can be used as operation and
maintenance signalling channel. At transmitter, a S/Q code for a message shall be repeated at
least six times or as many as necessary to obtain the desired response. At receiver, a
message shall be considered received only when the proper codes is received three
consecutive times.
I3_SFL
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PDF描述 |
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| W6693A | USB Bus ISDN S/T Interface Controller(USB總線的ISDN S/T接口控制器) |
| W6694 | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| W6810 | SINGLE-CHANNEL VOICEBAND CODEC |
| W6810IE | SINGLE-CHANNEL VOICEBAND CODEC |
| W6810IR | SINGLE-CHANNEL VOICEBAND CODEC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W6692A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with PCI 2.2 Interface and ACPT |
| W6692ACD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6692ACF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6694 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W6694A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with USB 1.1 Interface |
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