
W6692
Publication Release Date: October 1998
- 9 -
Revision A1
Pin Description, contiuned
PIN NAME
IO0-IO10
PIN NO.
TYPE
I/O
FUNCTIONS
79, 78, 77, 29, 28,
27, 26, 4, 3, 2, 1
When confiured as simple IO mode (PCTL:
XMODE = 0), these pins can read/write data
from/to peripheral components. The pin directions
are selected via register.
When configured as microprocessor mode
(PCTL: XMODE = 1), address and data are
multiplexed on these pins.
When configured as microprocessor mode
(PCTL: XMODE = 1), this is the Address Latch
Enable output.
When configured as microprocessor mode
(PCTL: XMODE = 1), this is the read pulse.
When configured as microprocessor mode
(PCTL: XMODE = 1), this is the write pulse.
POWER AND GROUND
I
Digital Power Supply (5V
±
5%).
I
Analog Power Supply (5V
±
5%).
I
PCI Bus Power Supply.
I
Digital Ground.
I
Analog Ground.
I
PCI Bus Ground.
XAD7-XAD0
29, 28, 27, 26,
4, 3, 2, 1
I/O
XALE
77
O
XRDB
78
O
XWRB
79
O
VDDD
17, 58, 67, 83
VDDA
51
VDDB
VSSD
VSSA
VSSB
6, 32, 43, 89
16, 59, 68, 82
48
5, 31, 42, 88
5. SYSTEM DIAGRAM AND APPLICATIONS
Typical applications include:
- PCI passive S-card for data only service
- PCI passive S-card with one handset/POTS connection
- PCI passive S-card with two POTS connections
The all-in-one characteristic of W6692 makes it excellent for ISDN Internet-access passive card
applications. The booming home PC market and powerful CPU capability make it possible to make a
very low-cost ISDN Internet access card by using CPU's computing power and user friendly PCI
interface. W6692 is designed for this type of scenario. W6692 integrates three HDLC controllers in
the chip and interfaces to PCI bus directly. In addition, W6692 provides peripheral control circuits for
PCM CODEC and POTS interface.
In the first and second applications, the all-in-one feature of W6692 makes glue circuit unnecessary.
In the third application, only a few TTL-like glue circuits are needed for the two POTS interface
control.