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參數資料
| 型號： | W6692 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 MM, 2.75 MM HEIGHT, QFP-100 |
| 文件頁數： | 35/84頁 |
| 文件大小： | 473K |
| 代理商： | W6692 |
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W6692
Publication Release Date: October 1998
- 35 -
Revision A1
The W6692 GCI Mode Signals are:
DIN/DOUT : 768 Kbps
DCL : 1.536 MHz input
FSC
: 8 KHz input
7.8.1 GCI Mode C/I Channel Handling
The Command/Indication channel carries real-time status information between the W6692 and
another device connected to the GCI bus interface.
One C/I channel conveys the commands and indications between a layer 1 device and layer 2 device.
This C/I channel is access via register CIR (in receive direction, layer 1 to layer 2) and register CIX (in
transmit direction, layer 2 to layer 1). The C/I code is 4-bit long.
In the receive direction, the code from layer 1 is continuously monitored, with an interrupt being
generated anytime a change occurs. A new code must be found in two consecutive GCI frames
to be consided valid and to trigger a C/I code change interrupt status (double last look criterion).
In the transmit direction, the code written in CIX is continuously transmitted in the channel.
7.8.2 GCI Mode Monitor Channel Handling
The Monitor channel protocol is a handshake protocol used for high speed information exchange
between the W6692 and other devices. In the W6692 GCI mode only one Monitor channel is
available. The Monitor channel is necessary for:
programming and controlling devices attached to the GCI interface.
data exchange between two microprocessor systems attached to two different devices on one GCI
backplane. Use of the Monitor channel avoids the necessity of a dedicated serial communication
path between two systems.
The Monitor channel operates on an asynchronous basis. While data transfers on the bus take place
synchronized to frame sync, the flow of data is controlled by a handshake procedure using the
Monitor Channel Receiver (MOR) and Monitor Channel Transmit (MOX) bits. When data is placed
into the Monitor channel and the MX bit is activated. This data will be transmitted repeatedly once per
8 KHz frame until the transfer is acknowledged via the MR bit.
The microprocessor may either enforce a 1 (idle state) in MR, MX by setting the control bit MRC or
MXC (MOCR register) to 0, or enable the control of these bits internally by the W6692 according to
the Monitor channel protocol. Thus, before a data exchange can begin, the control bit MRC, or MXC
should be set to 1 by the microprocessor.
The relevant status bits are:
for the reception of Monitor data: MDR (Monitor Channel Data Received)
MER (Monitor
Channel End of Reception)
for the transmission of Monitor data: MDA (Monitor Channel Data Acknowledged)
MAB
(Monitor Channel Data Abort)
About the status bit MAC (Monitor Channel Transmit Active) indicates whether a transmission is
progress
.
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| W6694 | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| W6810 | SINGLE-CHANNEL VOICEBAND CODEC |
| W6810IE | SINGLE-CHANNEL VOICEBAND CODEC |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W6692A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with PCI 2.2 Interface and ACPT |
| W6692ACD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6692ACF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6694 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W6694A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with USB 1.1 Interface |
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